History log of /rk3399_ARM-atf/ (Results 10526 – 10550 of 18314)
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c6a2ca0a27-Aug-2020 Manish Pandey <manish.pandey2@arm.com>

Merge "Add support for hexadecimal and pointer format specifiers to snprintf()" into integration

8ea4f80a12-Aug-2020 Usama Arif <usama.arif@arm.com>

fdts: tc0: add support for cpu-idle-states

This includes both cpu and cluster sleep parameters.

Change-Id: I6a9e90b88508d6d2acd2538007cbbdd1cf976442
Signed-off-by: Usama Arif <usama.arif@arm.com>

a41973a910-Jun-2020 Usama Arif <usama.arif@arm.com>

fdts: tc0: Add node for mmc

The pl180 mmc uses 3.3V fixed regulator and vexpress
sysreg for card detection and write protect.

Change-Id: I2513cfcb97217e282a081a700f3a9f723e8207ff
Signed-off-by: Usa

fdts: tc0: Add node for mmc

The pl180 mmc uses 3.3V fixed regulator and vexpress
sysreg for card detection and write protect.

Change-Id: I2513cfcb97217e282a081a700f3a9f723e8207ff
Signed-off-by: Usama Arif <usama.arif@arm.com>

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7969747e14-Aug-2020 Sandrine Bailleux <sandrine.bailleux@arm.com>

doc: Improve contribution guidelines

- Add some guidance about the type of information a patch author should
provide to facilitate the review (and for future reference).

- Make a number of implic

doc: Improve contribution guidelines

- Add some guidance about the type of information a patch author should
provide to facilitate the review (and for future reference).

- Make a number of implicit expectations explicit:
- Every patch must compile.
- All CI tests must pass.

- Mention that the patch author is expected to add reviewers and explain
how to choose them.

- Explain the patch submission rules in terms of Gerrit labels.

Also do some cosmetic changes, like adding empty lines, shuffling some
paragraphs around.

Change-Id: I6dac486684310b5a35aac7353e10fe5474a81ec5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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262aceaa12-Aug-2020 Sandeep Tripathy <sandeep.tripathy@broadcom.com>

ehf: use common priority level enumuration

'EHF' is used by RAS, SDEI, SPM_MM common frameworks.
If platform needs to plug-in specific handlers then
'PLAT_EHF_DESC' can be used to populate platform

ehf: use common priority level enumuration

'EHF' is used by RAS, SDEI, SPM_MM common frameworks.
If platform needs to plug-in specific handlers then
'PLAT_EHF_DESC' can be used to populate platform specific
priority levels.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Change-Id: I37af7e0e48111f87b6982604bf5c15db3e05755d

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a4c979ad26-Aug-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration

* changes:
qti/sc7180: Do shutdown handling outside qtiseclib
qti: Add SPMI PMIC arbitrator driver
qti/sc7180: Fix GIC-600 support

Merge changes I6bf1db15,I8631c34a,Id76ada14 into integration

* changes:
qti/sc7180: Do shutdown handling outside qtiseclib
qti: Add SPMI PMIC arbitrator driver
qti/sc7180: Fix GIC-600 support setting

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524eecc621-Aug-2020 Javier Almansa Sobrino <javier.almansasobrino@arm.com>

Add support for hexadecimal and pointer format specifiers to snprintf()

The current implementation of snprintf() does not support pointer and
hexadecimal format specifiers, which can be needed, for

Add support for hexadecimal and pointer format specifiers to snprintf()

The current implementation of snprintf() does not support pointer and
hexadecimal format specifiers, which can be needed, for instance, for
DTB manipulations.

This patch adds that functionality by borrowing some code from the
printf() implementation.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I2076ea46693a73a04890982bf20e3c633c2767fb

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522a227721-Feb-2019 Julius Werner <jwerner@chromium.org>

qti/sc7180: Do shutdown handling outside qtiseclib

With an open source SPMI driver we can now remove qtiseclib involvement
in reset and shutdown handling by setting the required registers
directly.

qti/sc7180: Do shutdown handling outside qtiseclib

With an open source SPMI driver we can now remove qtiseclib involvement
in reset and shutdown handling by setting the required registers
directly.

Change-Id: I6bf1db15734048df583daa2a4ee98701c6ece621
Signed-off-by: Julius Werner <jwerner@chromium.org>

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3e1e08b725-Aug-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "tegra194-spmd" into integration

* changes:
Tegra194: introduce support for `SPD=spmd`
Tegra: introduce backend support to compile libfdt
Tegra: disable signed compari

Merge changes from topic "tegra194-spmd" into integration

* changes:
Tegra194: introduce support for `SPD=spmd`
Tegra: introduce backend support to compile libfdt
Tegra: disable signed comparison
plat: common: include "bl_common.h" from plat_spmd_manifest.c

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0d5caf9525-Aug-2020 Varun Wadekar <vwadekar@nvidia.com>

Merge changes from topic "tegra-downstream-07092020" into integration

* changes:
Tegra194: remove AON_WDT IRQ mapping
Tegra: smmu: add smmu_verify function
Tegra: TZDRAM setup from soc specifi

Merge changes from topic "tegra-downstream-07092020" into integration

* changes:
Tegra194: remove AON_WDT IRQ mapping
Tegra: smmu: add smmu_verify function
Tegra: TZDRAM setup from soc specific early_boot handlers
Tegra: remove "platform_get_core_pos" function
Tegra: print GICC registers conditionally
lib: cpus: sanity check pointers before use
Tegra: spe: do not flush console in console_putc
Tegra: verify platform compatibility

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f40008a405-Jun-2019 Julius Werner <jwerner@chromium.org>

qti: Add SPMI PMIC arbitrator driver

This patch adds a very rudimentary driver for the SPMI arbitrator used
to access the PMIC. It doesn't support all the controller's actual
arbitration features, s

qti: Add SPMI PMIC arbitrator driver

This patch adds a very rudimentary driver for the SPMI arbitrator used
to access the PMIC. It doesn't support all the controller's actual
arbitration features, so it should probably not be used concurrently
with a running kernel (and it's also not optimized for performance). But
it can be used to set a few registers during boot or on shutdown to
control reset handling, which is all we need it for.

Change-Id: I8631c34a2a89ac71aa1ec9b8266e818c922fe34a
Signed-off-by: Julius Werner <jwerner@chromium.org>

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2acf004325-Aug-2020 Julius Werner <jwerner@chromium.org>

qti/sc7180: Fix GIC-600 support setting

The patch adding platform support for sc7180 landed around roughly the
same time as the patch that changed GICV3_IMPL to GICV3_SUPPORT_GIC600.
Thus the sc7180

qti/sc7180: Fix GIC-600 support setting

The patch adding platform support for sc7180 landed around roughly the
same time as the patch that changed GICV3_IMPL to GICV3_SUPPORT_GIC600.
Thus the sc7180 Makefile is still using the old variable name which now
no longer does anything, and it hangs on boot due to the lacking GIC-600
support. This patch fixes the issue.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Id76ada1445c3c5ac9a5a3697b4e749088b89d796

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670306d320-Jul-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra194: introduce support for `SPD=spmd`

This patch introduces the following changes to enable
compilation for `SPD=spmd` command line option.

* compile plat_spmd_manifest.c
* compile libfdt sour

Tegra194: introduce support for `SPD=spmd`

This patch introduces the following changes to enable
compilation for `SPD=spmd` command line option.

* compile plat_spmd_manifest.c
* compile libfdt source files

Verified with the `SPD=spmd` command line option for
Tegra194 platforms.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I7f57aa4f1756b19f78d87415bb80794417174bc8

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eb7e508720-Jul-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra: introduce backend support to compile libfdt

This patch includes the following files from libc to
compile libfdt:

* memchr.c
* memcmp.c
* strrchr.c

The BUILD_PLAT macro is evaluated earlier

Tegra: introduce backend support to compile libfdt

This patch includes the following files from libc to
compile libfdt:

* memchr.c
* memcmp.c
* strrchr.c

The BUILD_PLAT macro is evaluated earlier to allow libfdt
installation to the right directory.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ie43fcf701dc051670e6372e21b3a84a6416c1735

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8d51439e24-Aug-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra: disable signed comparison

libfdt does not support the -Wsign-compare compiler option
and the right patch will eventually be pushed upstream.

This patch disables the -Wsign-compare compiler o

Tegra: disable signed comparison

libfdt does not support the -Wsign-compare compiler option
and the right patch will eventually be pushed upstream.

This patch disables the -Wsign-compare compiler option
to allow libfdt compilation for Tegra platforms until
the actual issue is fixed.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ib7a93946cad1ea9ec1b46751edb79a74c08ed0ac

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cb7b9db120-Jul-2020 Varun Wadekar <vwadekar@nvidia.com>

plat: common: include "bl_common.h" from plat_spmd_manifest.c

This patch includes the bl_common.h from plat_spmd_manifest.c to
fix the following compilation errors

<snip>
plat/common/plat_spmd_mani

plat: common: include "bl_common.h" from plat_spmd_manifest.c

This patch includes the bl_common.h from plat_spmd_manifest.c to
fix the following compilation errors

<snip>
plat/common/plat_spmd_manifest.c: In function 'plat_spm_core_manifest_load':
plat/common/plat_spmd_manifest.c:130:18: error: implicit declaration of function 'page_align' [-Werror=implicit-function-declaration]
130 | pm_base_align = page_align(pm_base, UP);
| ^~~~~~~~~~
plat/common/plat_spmd_manifest.c:130:38: error: 'UP' undeclared (first use in this function); did you mean 'UL'?
130 | pm_base_align = page_align(pm_base, UP);
| ^~
| UL
plat/common/plat_spmd_manifest.c:130:38: note: each undeclared identifier is reported only once for each function it appears in
plat/common/plat_spmd_manifest.c:146:38: error: 'DOWN' undeclared (first use in this function)
146 | pm_base_align = page_align(pm_base, DOWN);
| ^~~~
cc1: all warnings being treated as errors
<snip>

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: Ib8edb36c6a80a23df2462e708c513c966aab1fef

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be41aac717-Feb-2020 Varun Wadekar <vwadekar@nvidia.com>

Tegra194: remove AON_WDT IRQ mapping

This patch removes the unused interrupt mapping for AON_WDT
for all Tegra194 platforms.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I475a1e83f

Tegra194: remove AON_WDT IRQ mapping

This patch removes the unused interrupt mapping for AON_WDT
for all Tegra194 platforms.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I475a1e83f809c740e62464b5b4e93cb0a2e33d6b

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21ec61a926-Sep-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: smmu: add smmu_verify function

The SMMU configuration can get corrupted or updated by
external clients during boot without our knowledge.

This patch introduces a "verify" function for the SM

Tegra: smmu: add smmu_verify function

The SMMU configuration can get corrupted or updated by
external clients during boot without our knowledge.

This patch introduces a "verify" function for the SMMU
driver, to check that the boot configuration settings are
intact. Usually, this function should be called at the
end of the boot cycle.

This function only calls panic() on silicon platforms.

Change-Id: I2ab45a7f228781e71c73ba1f4ffc49353effe146
Signed-off-by: George Bauernschmidt <georgeb@nvidia.com>

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13fed5a722-Aug-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: TZDRAM setup from soc specific early_boot handlers

TZDRAM setup is not required for all Tegra SoCs. The previous bootloader
can enable the TZDRAM fence due to architectural improvements in th

Tegra: TZDRAM setup from soc specific early_boot handlers

TZDRAM setup is not required for all Tegra SoCs. The previous bootloader
can enable the TZDRAM fence due to architectural improvements in the
newer chips.

This patch moves the TZDRAM setup to early_boot handlers for SoCs to
handle this scenario.

Change-Id: I6481b4f848a4dadc20cb83852cd8e19a242b3a34
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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f41dc86c16-Oct-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: remove "platform_get_core_pos" function

This patch removes the deprecated 'plat_core_pos_by_mpidr' function
from the Tegra platform port.

Change-Id: I32e06cb7269e4fbfaf9ad6c26d0722201f982f9e

Tegra: remove "platform_get_core_pos" function

This patch removes the deprecated 'plat_core_pos_by_mpidr' function
from the Tegra platform port.

Change-Id: I32e06cb7269e4fbfaf9ad6c26d0722201f982f9e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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7cd336ab04-Oct-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: print GICC registers conditionally

The GICC interface exists only on the interrupt controllers following
the GICv2 specification.

This patch prints the GICC register contents from the platfo

Tegra: print GICC registers conditionally

The GICC interface exists only on the interrupt controllers following
the GICv2 specification.

This patch prints the GICC register contents from the platform's macro,
plat_crash_print_regs' only when TEGRA_GICC_BASE is defined. This
allows platforms using future versions of the GIC specification to
still use this macro.

Change-Id: Ia5762d0a1ae28c832664d69362a7776e46a22ad1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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601e3ed201-Oct-2019 Varun Wadekar <vwadekar@nvidia.com>

lib: cpus: sanity check pointers before use

The cpu_ops structure contains a lot of function pointers. It
is a good idea to verify that the function pointer is not NULL
before executing it.

This pa

lib: cpus: sanity check pointers before use

The cpu_ops structure contains a lot of function pointers. It
is a good idea to verify that the function pointer is not NULL
before executing it.

This patch sanity checks each pointer before use to prevent any
unforeseen crashes. These checks have been enabled for debug
builds only.

Change-Id: Ib208331c20e60f0c7c582a20eb3d8cc40fb99d21
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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64b2a23713-Sep-2019 Varun Wadekar <vwadekar@nvidia.com>

Tegra: spe: do not flush console in console_putc

SPE no longer requires the flush bit to be set to start transmitting
characters over the physical uart. Therefore, the flush bit is no
longer require

Tegra: spe: do not flush console in console_putc

SPE no longer requires the flush bit to be set to start transmitting
characters over the physical uart. Therefore, the flush bit is no
longer required when calling console_core_putc. However, flushing the
console still requires the flush bit.

This patch removes the flush bit from the mailbox messages in
console_core_putc to improve ACK latency.

Original change by: Mustafa Bilgen <mbilgen@nvidia.com>

Change-Id: I5b7d1f3ea69ea2ce308566dbaae222b04e4c373d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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fbcd053c13-Sep-2019 kalyanic <kalyanic@nvidia.com>

Tegra: verify platform compatibility

This patch verifies that the binary image is compatible with
chip ID of the platform.

Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4
Signed-off-by: kalyan

Tegra: verify platform compatibility

This patch verifies that the binary image is compatible with
chip ID of the platform.

Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4
Signed-off-by: kalyanic <kalyanic@nvidia.com>

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2b4103f724-Aug-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "tools: Get the tool's binary name from the main makefile" into integration

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