drivers: stm32_fmc2_nand: move to new bindings

FMC node bindings are modified to add EBI controller node.
FMC driver and associated device tree files are modified
to support these new bindings.

Cha

drivers: stm32_fmc2_nand: move to new bindings

FMC node bindings are modified to add EBI controller node.
FMC driver and associated device tree files are modified
to support these new bindings.

Change-Id: I4bf201e96a1aca20957e0dac3a3b87caadd05bdc
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

show more ...

Merge "intel: platform: Include GICv2 makefile" into integration

Makefile: Remove unused macro

Removed unused macro AARCH32 and AARCH64 from makefile

Change-Id: I6729e300f18d66dd7c6978d3bbd5a88937839c31
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

plat: brcm: Remove 'AARCH32' deprecated macro

Removed 'AARCH32' deprecated macro from 'stingray'
Broadcom platform code.

Change-Id: If8d9e785b7980fefd39df06547fcf71b899fd735
Signed-off-by: Manish V

plat: brcm: Remove 'AARCH32' deprecated macro

Removed 'AARCH32' deprecated macro from 'stingray'
Broadcom platform code.

Change-Id: If8d9e785b7980fefd39df06547fcf71b899fd735
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

Remove deprecated macro from TF-A code

Removed '__ASSEMBLY__' deprecated macro from TF-A code

Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@

Remove deprecated macro from TF-A code

Removed '__ASSEMBLY__' deprecated macro from TF-A code

Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

Merge "TF-A: Add HASH_ALG default value to defaults.mk" into integration

Merge "mediatek: mt8192: add GIC600 support" into integration

TF-A: Add HASH_ALG default value to defaults.mk

This patch adds default value of 'sha256' for HASH_ALG
build flag to 'make_helpers\defaults.mk', according to
'docs\getting_started\build-options.rst'

TF-A: Add HASH_ALG default value to defaults.mk

This patch adds default value of 'sha256' for HASH_ALG
build flag to 'make_helpers\defaults.mk', according to
'docs\getting_started\build-options.rst'.
This fixes Measured Boot driver error when TF-A uses
default HASH_ALG value and TPM_HASH_ALG is set to
sha384 or sha512.

Change-Id: Id0aa34b54807de0adaf88e5f7d7032577c22f365
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

show more ...

docs: marvell: update ddr3 build instructions

Add information about 2GB variant of EspressoBin V5 and use Marvell git
branches which contain required fixes for EspressoBin.

Signed-off-by: Pali Rohá

docs: marvell: update ddr3 build instructions

Add information about 2GB variant of EspressoBin V5 and use Marvell git
branches which contain required fixes for EspressoBin.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I1db510f1576f4762259ad7b0c10024b8ab434a59

show more ...

Fix casting bug in gicv2_main.c

In the function gicv2_set_spi_routing, the signed value proc_num is cast
to unsigned int before being compared to other unsigned values in two
assert calls. The valu

Fix casting bug in gicv2_main.c

In the function gicv2_set_spi_routing, the signed value proc_num is cast
to unsigned int before being compared to other unsigned values in two
assert calls. The value proc_num can be a negative value, and once the
negative value is cast to unsigned it becomes a very large number which
will trigger the assert. This patch changes the assert cast so that the
unsigned values are cast to signed instead, keeping the same functionality
but allowing proc_num to be negative.

This bug can be seen when running the SDEI RM_ANY routing mode test in
TFTF on the Juno platform.

This patch also makes the usage of the proc_num variable in other gicv2
functions more clear.

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If1b98eebb00bd9b73862e5e995e5e68c168170a6

show more ...

Merge "Workaround for Cortex A77 erratum 1925769" into integration

Don't return error information from console_flush

And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return typ

Don't return error information from console_flush

And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return type to void does not
work around the MISRA violation that this causes. Instead, we collect
the error information from the driver (to avoid changing that API), and
don't return it to the caller.

Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

show more ...

Merge "drivers: stm32_fmc2_nand: fix incorrect error detection" into integration

Merge changes I99a5d96f,I89b950f0 into integration

* changes:
lib/cpus: update MIDR value for rainier cpu
fdts: enable virtio-rng component for morello fvp platform

lib/cpus: update MIDR value for rainier cpu

This patch updates the MIDR value for rainier cpu.

Change-Id: I99a5d96f757239cf65b2688095c4ec66cd991cf9
Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm

lib/cpus: update MIDR value for rainier cpu

This patch updates the MIDR value for rainier cpu.

Change-Id: I99a5d96f757239cf65b2688095c4ec66cd991cf9
Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm.com>

show more ...

Merge changes from topic "stm32mp1_platform_mk" into integration

* changes:
stm32mp1: cosmetics in platform.mk
stm32mp1: update rules for stm32image tool
stm32mp1: add macros to define PLAT_PA

Merge changes from topic "stm32mp1_platform_mk" into integration

* changes:
stm32mp1: cosmetics in platform.mk
stm32mp1: update rules for stm32image tool
stm32mp1: add macros to define PLAT_PARTITION_MAX_ENTRIES
stm32mp1: sort platform.mk
stm32mp1: use ASFLAGS for binary paths
stm32mp1: use internal MAKE_LD macro to generate stm32 linker files

show more ...

stm32mp1: cosmetics in platform.mk

Remove some useless extra tabs or spaces.
Replace some spaces with tabs.

Change-Id: I0e8e2a1a1be7a1109ba7f3e3ae35e3fe1b5b4552
Signed-off-by: Yann Gautier <yann.ga

stm32mp1: cosmetics in platform.mk

Remove some useless extra tabs or spaces.
Replace some spaces with tabs.

Change-Id: I0e8e2a1a1be7a1109ba7f3e3ae35e3fe1b5b4552
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

stm32mp1: update rules for stm32image tool

In heavy parallel builds, it has sometimes been seen issues with the
tool not generated before it was needed. Change some rules order and
dependency to sol

stm32mp1: update rules for stm32image tool

In heavy parallel builds, it has sometimes been seen issues with the
tool not generated before it was needed. Change some rules order and
dependency to solve that.

Change-Id: I8f4b4f46a2ea0fe496bc66bca47c66d1c81d3c99
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

stm32mp1: add macros to define PLAT_PARTITION_MAX_ENTRIES

There were fixed values when computing PLAT_PARTITION_MAX_ENTRIES.
Use STM32_BL33_PARTS_NUM and STM32_RUNTIME_PARTS_NUM. The first one is
fo

stm32mp1: add macros to define PLAT_PARTITION_MAX_ENTRIES

There were fixed values when computing PLAT_PARTITION_MAX_ENTRIES.
Use STM32_BL33_PARTS_NUM and STM32_RUNTIME_PARTS_NUM. The first one is
for the number of copies of BL33. The second one depends on the use case
SP_min or OP-TEE. For OP-TEE, there are 3 partitions. For SP_min, as it
is in the same binary as BL2, it is set to 0. It will be set to 1 if
BL32 is in a separate binary.

Change-Id: Iba4d8ec5fbc713bebfbdcd9f9426c3fded20d3ad
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

stm32mp1: sort platform.mk

First put Makefile variables definition, then definitions for each feature,
then C flags, then source files, then compilation rules.

Change-Id: I238115ea2fe4ebafccd213597

stm32mp1: sort platform.mk

First put Makefile variables definition, then definitions for each feature,
then C flags, then source files, then compilation rules.

Change-Id: I238115ea2fe4ebafccd2135979814c27932c34e2
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

stm32mp1: use ASFLAGS for binary paths

To simplify the rule that creates the concatenated binary, use ASFLAGS
instead of adding all paths in the AS command line. This allows a better
management if a

stm32mp1: use ASFLAGS for binary paths

To simplify the rule that creates the concatenated binary, use ASFLAGS
instead of adding all paths in the AS command line. This allows a better
management if a binary is not present.

Change-Id: Ic8b4566e7dedc6f55be355a92e3b214cef138d9b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

stm32mp1: use internal MAKE_LD macro to generate stm32 linker files

The previous proprietary version was not correctly handling dependencies.
Using MAKE_LD from make_helpers files now correctly hand

stm32mp1: use internal MAKE_LD macro to generate stm32 linker files

The previous proprietary version was not correctly handling dependencies.
Using MAKE_LD from make_helpers files now correctly handles that.
The generated linker script is the same as before.

Change-Id: Iccfd8dc3fffa7a33e73b184b72e0dfd5d26bc9c9
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

fdts: enable virtio-rng component for morello fvp platform

enable virtio-rng component for morello fvp platform

Change-Id: I89b950f067a4d14dfa418de3859c88c8f91cf7c5
Signed-off-by: Jagadeesh Ujja <j

fdts: enable virtio-rng component for morello fvp platform

enable virtio-rng component for morello fvp platform

Change-Id: I89b950f067a4d14dfa418de3859c88c8f91cf7c5
Signed-off-by: Jagadeesh Ujja <jagadeesh.ujja@arm.com>

show more ...

drivers: stm32_fmc2_nand: fix incorrect error detection

Clear interrupt flag register after each sector read to avoid
issue when checking the register status.
Without clearing the interrupt, the sta

drivers: stm32_fmc2_nand: fix incorrect error detection

Clear interrupt flag register after each sector read to avoid
issue when checking the register status.
Without clearing the interrupt, the status read doesn't wait
properly the ready bit.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: If290e3f165b986f0e736bb1b5e4d3dad4b749d74

show more ...

Workaround for Cortex A77 erratum 1925769

Cortex A77 erratum 1925769 is a Cat B erratum, present in older
revisions of the Cortex A77 processor core. The workaround is to
set bit 8 in the ECTLR_EL1

Workaround for Cortex A77 erratum 1925769

Cortex A77 erratum 1925769 is a Cat B erratum, present in older
revisions of the Cortex A77 processor core. The workaround is to
set bit 8 in the ECTLR_EL1 register, there is a small performance cost
(<0.5%) for setting this bit.

SDEN can be found here:
https://documentation-service.arm.com/static/5f7c35d0d3be967f7be46d33

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I9cf0e0b5dc1e3e32e24279d2632c759cc7bd7ce9

show more ...