cadence: Change logic in uart driver

Write char if fifo is empty. If this is done like this all chars are
printed. Because origin code just put that chars to fifo and in case of
reset messages were

cadence: Change logic in uart driver

Write char if fifo is empty. If this is done like this all chars are
printed. Because origin code just put that chars to fifo and in case of
reset messages were missing.

Before this change chars are put to fifo and only check before adding if
fifo is full. The patch is changing this logic that it is adding char only
when fifo is empty to make sure that in case of reset (by another SW for
example) all chars are printed. Maybe one char can be missed but for IP
itself it is much easier to send just one char compare to full fifo.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: Ic24c2c1252bce24be2aed68ee29477ca4a549e5f

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drivers: renesas: rcar: io: Code cleanup

This patch fixes checkpatch warnings and arrange header
as per TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prab

drivers: renesas: rcar: io: Code cleanup

This patch fixes checkpatch warnings and arrange header
as per TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I46cd4d9b2851202324fe714e776cf3ad2ee1d923

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drivers: renesas: rcar: dma: Fix coding style

Sort the headers alphabetically and replace TAB with a space
after #define.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabh

drivers: renesas: rcar: dma: Fix coding style

Sort the headers alphabetically and replace TAB with a space
after #define.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I07c358294b7c02cbfa360112bbbde0eb5f2b50f5

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drivers: renesas: rcar: pwrc: Code cleanup

This patches fixes checkpatch warnings, replace TAB with space
after #define macros and arrange header as per TF-A coding style.

Signed-off-by: Biju Das <

drivers: renesas: rcar: pwrc: Code cleanup

This patches fixes checkpatch warnings, replace TAB with space
after #define macros and arrange header as per TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Iba009587e0b499b3ae58876be390602ae14175b2

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drivers: renesas: rcar: delay: Fix checkpatch warnings

Fix checkpatch warnings.

There are no functional changes.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <pr

drivers: renesas: rcar: delay: Fix checkpatch warnings

Fix checkpatch warnings.

There are no functional changes.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Iec7dd019bd38e84eccd8cc17189745fdef1911bb

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drivers: renesas: rcar: common: Code cleanup

This patch fixes the below checkpatch warnings
Line 13: WARNING: please, no spaces at the start of a line
Line 15: WARNING: please, no spaces at the st

drivers: renesas: rcar: common: Code cleanup

This patch fixes the below checkpatch warnings
Line 13: WARNING: please, no spaces at the start of a line
Line 15: WARNING: please, no spaces at the start of a line
Line 18: WARNING: Missing a blank line after declarations
Line 24: WARNING: please, no spaces at the start of a line
Line 26: WARNING: please, no spaces at the start of a line
Line 29: WARNING: Missing a blank line after declarations

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I41d146e86889640d11e88c0717039353ddceff0d

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drivers: renesas: rcar: avs: Fix checkpatch warnings

Fix checkpatch warnings.

There are no functional changes.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prab

drivers: renesas: rcar: avs: Fix checkpatch warnings

Fix checkpatch warnings.

There are no functional changes.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Ic7406aa88e121914270a8d192f170c9c4244578a

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drivers: renesas: rcar: watchdog: Fix typo

Fix the typo "occured" -> "occurred"

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.

drivers: renesas: rcar: watchdog: Fix typo

Fix the typo "occured" -> "occurred"

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Ic66ceab364f7dc926dc6a6db641ca173601cd031

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drivers: renesas: rcar: auth: Use space instead of TAB

Use space instead of TAB after #define's. Also updated
header files as per TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.

drivers: renesas: rcar: auth: Use space instead of TAB

Use space instead of TAB after #define's. Also updated
header files as per TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I4eac94f0bc79f24b8ac7165ec48f1e1de95d7205

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drivers: renesas: rcar: scif: Fix coding style

Replace TAB with space after #define macros and update comments as per
TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewe

drivers: renesas: rcar: scif: Fix coding style

Replace TAB with space after #define macros and update comments as per
TF-A coding style.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Iff46838a41f991f7dd9dc6fb043e9e482ea0b11d

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drivers: renesas: rcar: iic_dvfs: Fix coding style

Sort the header includes alphabetically, fix typos and drop unneeded TAB
and replace it with space

Signed-off-by: Biju Das <biju.das.jz@bp.renesas

drivers: renesas: rcar: iic_dvfs: Fix coding style

Sort the header includes alphabetically, fix typos and drop unneeded TAB
and replace it with space

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: I62e2658b0309c0985dd32ff023b8b16bd7f2be8e

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plat/arm: rename rddanielxlr to rdv1mc

Reference Design platform RD-Daniel-ConfigXLR has been renamed to
RD-V1-MC. Correspondingly, remove all uses of 'rddanielxlr' and replace
it with 'rdv1mc' wher

plat/arm: rename rddanielxlr to rdv1mc

Reference Design platform RD-Daniel-ConfigXLR has been renamed to
RD-V1-MC. Correspondingly, remove all uses of 'rddanielxlr' and replace
it with 'rdv1mc' where appropriate.

Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Change-Id: I5d91c69738397b19ced43949b4080c74678e604c

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plat/arm: rename rddaniel to rdv1

Reference Design platform RD-Daniel has been renamed to RD-V1.
Correspondingly, remove all uses of 'rddaniel' and replace it with
'rdv1' where appropriate.

Signed-

plat/arm: rename rddaniel to rdv1

Reference Design platform RD-Daniel has been renamed to RD-V1.
Correspondingly, remove all uses of 'rddaniel' and replace it with
'rdv1' where appropriate.

Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Change-Id: I1702bab39c501f8c0a09df131cb2394d54c83bcf

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plat: xilinx: Fix non-MISRA compliant code

This patch fixes the non compliant code like missing braces for
conditional single statement bodies.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.ab

plat: xilinx: Fix non-MISRA compliant code

This patch fixes the non compliant code like missing braces for
conditional single statement bodies.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I95b410ae5950f85dc913c4448fcd0a97e0fd490c

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Makefile: Fix ${FIP_NAME} to be rebuilt only when needed

Currently ${FIP_DEPS} as prerequisite for ${BUILD_PLAT}/${FIP_NAME}
contains .PHONY targets check_$(1) and therefore ${BUILD_PLAT}/${FIP_NAME

Makefile: Fix ${FIP_NAME} to be rebuilt only when needed

Currently ${FIP_DEPS} as prerequisite for ${BUILD_PLAT}/${FIP_NAME}
contains .PHONY targets check_$(1) and therefore ${BUILD_PLAT}/${FIP_NAME}
is always rebuilt even when other file target prerequisites are not
changed.

These changes fix above issue and ${BUILD_PLAT}/${FIP_NAME} target is
rebuilt only when its prerequisites are changed.

There are 3 changes:

Content of check_$(1) target is moved into check_$(1)_cmd variable so it
can be easily reused.

.PHONY check_$(1) targets are not put into ${FIP_DEPS} and ${FWU_FIP_DEPS}
dependencies anymore and required checks which are in ${CHECK_FIP_CMD} and
${CHECK_FWU_FIP_CMD} variables are executed as part of targets
${BUILD_PLAT}/${FIP_NAME} and ${BUILD_PLAT}/${FWU_FIP_NAME} itself.

To ensure that ${BUILD_PLAT}/${FIP_NAME} and ${BUILD_PLAT}/${FWU_FIP_NAME}
are rebuilt even when additional dependency file image added by
TOOL_ADD_IMG is changed, this file image (if exists) is added as file
dependency to ${FIP_DEPS} and ${FWU_FIP_DEPS}. If it does not exist then
FORCE target is added to ensure that FIP/FWU_FIP is rebuilt. Command
${CHECK_FIP_CMD}/${CHECK_FWU_FIP_CMD} will then thrown an error message if
the file is required but not present.

So this change ensures that if BL33 image is updated then final FIP image
is updated too. And if BL33 image is not specified or does not exist and is
required to be present then check_$(1)_cmd call from ${CHECK_FIP_CMD} would
ensure that error message is thrown during build.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I635cf82e2b667ff57e2af83500d4aca71d235e3e

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Makefile: Do not mark file targets as .PHONY target

Only non-file targets should be set a .PHONY. Otherwise if file target is
set as .PHONY then targets which depends on those file .PHONY targets wo

Makefile: Do not mark file targets as .PHONY target

Only non-file targets should be set a .PHONY. Otherwise if file target is
set as .PHONY then targets which depends on those file .PHONY targets would
be always rebuilt even when their prerequisites are not changed.

File target which needs to be always rebuilt can be specified in Make
system via having a prerequisite on some .PHONY target, instead of marking
whole target as .PHONY. In Makefile projects it is common to create empty
.PHONY target named FORCE for this purpose.

This patch changes all file targets which are set as .PHONY to depends on
new .PHONY target FORCE, to ensure that these file targets are always
rebuilt (as before). Basically they are those targets which calls external
make subprocess.

After FORCE target is specified in main Makefile, remove it from other
Makefile files to prevent duplicate definitions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iee3b4e0de93879b95eb29a1745a041538412e69e

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Merge "AArch64: Fix assertions in processing dynamic relocations" into integration

Merge "drivers: renesas: rcar: eMMC driver code clean up" into integration

Merge "plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor" into integration

Merge changes from topic "xilinx-sd-tap-delay" into integration

* changes:
plat: zynqmp: Disable ITAPDLYENA bit for zero ITAP delay
plat: zynqmp: Check for DLL status before doing reset

AArch64: Fix assertions in processing dynamic relocations

This patch provides the following changes in fixup_gdt_reloc()
function:
- Fixes assertions in processing dynamic relocations, when
relocati

AArch64: Fix assertions in processing dynamic relocations

This patch provides the following changes in fixup_gdt_reloc()
function:
- Fixes assertions in processing dynamic relocations, when
relocation entries not matching R_AARCH64_RELATIVE type are found.
Linker might generate entries of relocation type R_AARCH64_NONE
(code 0), which should be ignored to make the code boot. Similar
issue was fixed in OP-TEE (see optee_os/ldelf/ta_elf_rel.c
commit 7a4dc765c133125428136a496a7644c6fec9b3c2)
- Fixes bug when "b.ge" (signed greater than or equal) condition
codes were used instead of "b.hs" (greater than or equal) for
comparison of absolute addresses.
- Adds optimisation which skips fixing Global Object Table (GOT)
entries when offset value is 0.

Change-Id: I35e34e055b7476843903859be947b883a1feb1b5
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor

Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
when enabled, adds code to the PSCI reset h

plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor

Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
when enabled, adds code to the PSCI reset handler to try to do system
reset by the WTMI firmware running on the Cortex-M3 secure coprocessor.
(This function is exposed via the mailbox interface.)

The reason is that the Turris MOX board has a HW bug which causes reset
to hang unpredictably. This issue can be solved by putting the board in
a specific state before reset.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f

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Merge "Plat AXG: Fix PLAT_MAX_PWR_LVL value" into integration

Merge changes from topic "zynqmp-new-apis" into integration

* changes:
xilinx: zynqmp: Add support for Error Management
zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
zynqmp : pm : Adds

Merge changes from topic "zynqmp-new-apis" into integration

* changes:
xilinx: zynqmp: Add support for Error Management
zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
zynqmp : pm : Adds new zynqmp-pm api SMC call for register access

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xilinx: zynqmp: Add support for Error Management

Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-b

xilinx: zynqmp: Add support for Error Management

Adding the EM specific smc handler for the EM-related requests.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I98122d49604a01a2f6bd1e509a5896ee68069dd0

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