refactor: report features supported to secure world

Report `FFA_MEM_PERM_GET` and `FFA_MEM_PERM_SET` supported to secure
world instances.

Signed-off-by: Karl Meakin <karl.meakin@arm.com>
Change-Id:

refactor: report features supported to secure world

Report `FFA_MEM_PERM_GET` and `FFA_MEM_PERM_SET` supported to secure
world instances.

Signed-off-by: Karl Meakin <karl.meakin@arm.com>
Change-Id: I90e6b0ab601ae1142b419cacfa56109c183ab640

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Merge "fix(rme): do not trap access to MPAM system registers in Realm mode" into integration

fix(rme): do not trap access to MPAM system registers in Realm mode

Change-Id: I77496ee962727687b28f71a1a15b4fe4133c613c
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>

feat(rmmd): verify FEAT_MEC present before calling plat hoook

Some platforms do not support FEAT_MEC. Hence, they do not provide
an interface to update the update of the key corresponding to a
MECID

feat(rmmd): verify FEAT_MEC present before calling plat hoook

Some platforms do not support FEAT_MEC. Hence, they do not provide
an interface to update the update of the key corresponding to a
MECID.

This patch adds a condition in order to verify FEAT_MEC is present
before calling the corresponding platform hook, thus preventing it
from being called when the platform does not support the feature.

Change-Id: Ib1eb9e42f475e27ec31529569e888b93b207148c
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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fix(spmd): check pwr mgmt status for SPMC framework response

The direct message response received by the SPMD upon a CPU_OFF power
management operation must be a framework message. If message indica

fix(spmd): check pwr mgmt status for SPMC framework response

The direct message response received by the SPMD upon a CPU_OFF power
management operation must be a framework message. If message indicates
SPMC denied the CPU_OFF operation, SPMD shall panic.

However, if SPMC does not support receiving power management
related framework messages from SPMD, it will return FFA_ERROR.
In such case, SPMD takes an implementation defined choice to ignore the
the FFA_ERROR and proceed with power management operation.

Change-Id: I18b9ee3fb8fd605bcd4aaa6802c969e9d36ccbe1
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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Merge changes from topic "mec" into integration

* changes:
feat(qemu): add plat_rmmd_mecid_key_update()
feat(rmmd): add RMM_MECID_KEY_UPDATE call

feat(rmmd): add RMM_MECID_KEY_UPDATE call

With this addition, TF-A now has an SMC call to handle the
update of MEC keys associated to MECIDs.

The behavior of this newly added call is empty for now

feat(rmmd): add RMM_MECID_KEY_UPDATE call

With this addition, TF-A now has an SMC call to handle the
update of MEC keys associated to MECIDs.

The behavior of this newly added call is empty for now until an
implementation for the MPE (Memory Protection Engine) driver is
available. Only parameter sanitization has been implemented.

Signed-off-by: Tushar Khandelwal <tushar.khandelwal@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>
Change-Id: I2a969310b47e8c6da1817a79be0cd56158c6efc3

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Merge "chore: organize rmmd smccc by fid sequence" into integration

chore: organize rmmd smccc by fid sequence

This patch only arranged the case numbers that were incorrectly
ordered.

Change-Id: I0da48c68c5c2f4b5ba19ab770377ea91066bcb6a
Signed-off-by: Sona Mathew <

chore: organize rmmd smccc by fid sequence

This patch only arranged the case numbers that were incorrectly
ordered.

Change-Id: I0da48c68c5c2f4b5ba19ab770377ea91066bcb6a
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(services): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value

fix(services): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value
from the argument.

Change-Id: I94e8048c43f767ad08820624b7c7e43b0a3e9190
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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feat(drtm): validate launch features in DRTM parameters

Perform sanity checks on the launch features received via DRTM parameters.
Return INVALID_PARAMETERS if they are incorrect.

Change-Id: I7e806

feat(drtm): validate launch features in DRTM parameters

Perform sanity checks on the launch features received via DRTM parameters.
Return INVALID_PARAMETERS if they are incorrect.

Change-Id: I7e8068154028d1c8f6b6b45449616bb5711ea76e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(errata-abi): add support for handling split workarounds

Certain erratum workarounds like Neoverse N1 1542419, need a part
of their mitigation done in EL3 and the rest in lower EL. But currently

fix(errata-abi): add support for handling split workarounds

Certain erratum workarounds like Neoverse N1 1542419, need a part
of their mitigation done in EL3 and the rest in lower EL. But currently
such workarounds return HIGHER_EL_MITIGATION which indicates that the
erratum has already been mitigated by a higher EL(EL3 in this case)
which causes the lower EL to not apply it's part of the mitigation.

This patch fixes this issue by adding support for split workarounds
so that on certain errata we return AFFECTED even though EL3 has
applied it's workaround. This is done by reusing the chosen field of
erratum_entry structure into a bitfield that has two bitfields -
Bit 0 indicates that the erratum has been enabled in build,
Bit 1 indicates that the erratum is a split workaround and should
return AFFECTED instead of HIGHER_EL_MITIGATION.

SDEN documentation:
https://developer.arm.com/documentation/SDEN885747/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: Iec94d665b5f55609507a219a7d1771eb75e7f4a7

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fix(el3-spmc): fix FF-A v1.2 version check

The two functions spmc_validate_mtd_start() and spmc_ffa_mem_send()
check FF-A version used with an end-point to determine the expected
minimal size of the

fix(el3-spmc): fix FF-A v1.2 version check

The two functions spmc_validate_mtd_start() and spmc_ffa_mem_send()
check FF-A version used with an end-point to determine the expected
minimal size of the memory transaction descriptor. However, they haven't
been updated for FF-A 1.2. So fix the two functions to take version 1.2
and beyond into account and use the version 1.1 size for the memory
transaction.

Change-Id: I86b9092eff7c4df557ee43522c680e3bf92199ba
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform

feat(drtm): retrieve DLME image authentication features

Retrieve DLME image authentication features and report them
back to the DCE preamble. Currently, this value is always set
to 0, as no platform supports DLME authentication.

Additionally, the default schema is always used instead of
the DLME PCR schema since DLME authentication is not currently
supported.

This change primarily upgrades the DRTM parameters version to V2,
aligning with DRTM spec v1.1 [1].

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: Ie2ceb0d2ff49465643597e8725710a93d89e74a2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(drtm): log No-Action Event in Event Log for DRTM measurements

This patch updates `drtm_measurements.c` to ensure that a No-Action
event is recorded in the Event Log as part of the DRTM measurem

feat(drtm): log No-Action Event in Event Log for DRTM measurements

This patch updates `drtm_measurements.c` to ensure that a No-Action
event is recorded in the Event Log as part of the DRTM measurement
process.
This helps maintain compliance with the event logging requirements
specified in DRTM spec v1.1 [1].

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: Ifcf25b7ec91393a0c91b05e30f1f6cc4960d5634
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(drtm): ensure event types aligns with DRTM specification v1.1

This patch updates event logging to comply with the latest version
(v1.1) of the DRTM specification [1]. It ensures that all requir

feat(drtm): ensure event types aligns with DRTM specification v1.1

This patch updates event logging to comply with the latest version
(v1.1) of the DRTM specification [1]. It ensures that all required
event types, including those related to DLME authentication, are
properly defined.

Although these additional events are not currently utilized in the
implementation, this change ensures their presence as specified in
DRTM v1.1 for completeness.

[1]: https://developer.arm.com/documentation/den0113/c/?lang=en

Change-Id: I6846488c4121b1e2dc948d73c946e06883e16b28
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(drtm): add missing DLME data regions for min size requirement

Ensure compliance with minimum size requirements by including the
missing DLME data regions, such as the DLME data header and ACPI
r

fix(drtm): add missing DLME data regions for min size requirement

Ensure compliance with minimum size requirements by including the
missing DLME data regions, such as the DLME data header and ACPI
region size.
This will prevent incorrect allocation of DLME data regions in
the DCE preamble.

Change-Id: Ic493262152dfe39eb2d54f8771f19651be042288
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "fix(spmd): prevent SIMD context loss" into integration

fix(spmd): prevent SIMD context loss

When SPMD_SPM_AT_SEL2 is enabled, saving and restoring the SIMD context
is not needed because the SPMC handles it. The function
spmd_secure_interrupt_handler inc

fix(spmd): prevent SIMD context loss

When SPMD_SPM_AT_SEL2 is enabled, saving and restoring the SIMD context
is not needed because the SPMC handles it. The function
spmd_secure_interrupt_handler incorrectly restores the SWD SIMD context
before entering the SPMC without saving the NWD SIMD context, leading to
its loss. Furthermore, the SWD SIMD context is saved after returning
from the SPMC which is unnecessary.

This commit prevents the restoration of the SWD SIMD context before SPMC
entry and the saving of the SWD SIMD context after returning from the
SPMC when SPMD_SPM_AT_SEL2 is enabled. This ensures the preservation of
the NWD SIMD context.

Change-Id: I16a3e698e61da7019b3a670475e542d1690a5dd9
Signed-off-by: Rakshit Goyal <rakshit.goyal@arm.com>

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fix(drtm): fix DLME data size check

dlme_data_min_size is currently defined in pages but is being compared
against byte sizes in the code. This patch corrects this issue.

Change-Id: Ib250ef6efedf32

fix(drtm): fix DLME data size check

dlme_data_min_size is currently defined in pages but is being compared
against byte sizes in the code. This patch corrects this issue.

Change-Id: Ib250ef6efedf321706624dfca263e8042a25f6d1
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(drtm): sort the address-map in ascending order

As per the specification the address map region in the
DLME data must be sorted.

Change-Id: Ibf39dad33ef7ce739d6ec8632198df55a4e8a1c3
Signed-off-b

fix(drtm): sort the address-map in ascending order

As per the specification the address map region in the
DLME data must be sorted.

Change-Id: Ibf39dad33ef7ce739d6ec8632198df55a4e8a1c3
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus

This patch implements SMCCC_ARCH_WORKAROUND_4 and
allows discovery through SMCCC_ARCH_FEATURES.
This mechanism is enabled if CVE_2024_78

fix(security): apply SMCCC_ARCH_WORKAROUND_4 to affected cpus

This patch implements SMCCC_ARCH_WORKAROUND_4 and
allows discovery through SMCCC_ARCH_FEATURES.
This mechanism is enabled if CVE_2024_7881 [1] is enabled
by the platform. If CVE_2024_7881 mitigation
is implemented, the discovery call returns 0,
if not -1 (SMC_ARCH_CALL_NOT_SUPPORTED).

For more information about SMCCC_ARCH_WORKAROUND_4 [2], please
refer to the SMCCC Specification reference provided below.

[1]: https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-7881
[2]: https://developer.arm.com/documentation/den0028/latest

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I1b1ffaa1f806f07472fd79d5525f81764d99bc79

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Merge "fix(el3-spmc): move ERROR line inside conditional" into integration

Merge "feat(el3-spmc): use spmd_smc_switch_state after secure interrupt" into integration

Merge "fix(spmd): fix build failure due to redefinition" into integration