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d7cff32a |
| 02-Nov-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(build): remove duplicated include order" into integration
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c189adbd |
| 31-Oct-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
fix(build): remove duplicated include order
Commit(3547270f5 refactor(build): reorder platform Makefile evaluation) re-ordered platform makefile inclusion before arch_features evaluations, but then
fix(build): remove duplicated include order
Commit(3547270f5 refactor(build): reorder platform Makefile evaluation) re-ordered platform makefile inclusion before arch_features evaluations, but then it fails to remove the dependency that were moved and thus have double evaluation of some build variables apparently this breaks BUILD_PLAT.
Additionally remove duplicate checks in SPMD similar checks are in place in main level makefile.
Change-Id: I5a71624fc43977054467ec6502ce359fb1d08838 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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4ede8c39 |
| 14-Aug-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "el3_direct_msg" into integration
* changes: docs(spm): document new build option feat(fvp): spmd logical partition smc handler feat(fvp): add spmd logical partition
Merge changes from topic "el3_direct_msg" into integration
* changes: docs(spm): document new build option feat(fvp): spmd logical partition smc handler feat(fvp): add spmd logical partition feat(spmd): get logical partitions info feat(spmd): add partition info get regs refactor(ff-a): move structure definitions feat(spmd): el3 direct message API feat(spmd): add spmd logical partitions
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5cf311f3 |
| 04-Mar-2023 |
Raghu Krishnamurthy <raghu.ncstate@gmail.com> |
feat(fvp): add spmd logical partition
This patch changes spmd.mk to include one or more SPMD logical partitions specific to a platform. It also adds a basic SPMD logical partition to fvp.
Change-Id
feat(fvp): add spmd logical partition
This patch changes spmd.mk to include one or more SPMD logical partitions specific to a platform. It also adds a basic SPMD logical partition to fvp.
Change-Id: I2075e0458c92813913b28cbf4cfffc1f151e65cf Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com>
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890b5088 |
| 25-Feb-2023 |
Raghu Krishnamurthy <raghu.ncstate@gmail.com> |
feat(spmd): add spmd logical partitions
Add header file to help with creation of SPMD logical partitions. Also update linker files to create sections to record SPMD logical partitions declared. This
feat(spmd): add spmd logical partitions
Add header file to help with creation of SPMD logical partitions. Also update linker files to create sections to record SPMD logical partitions declared. This follows the same pattern as the EL3 SPMC's logical partitions. This patch also adds initialization of SPMD logical partitions when the SPMD comes up. ENABLE_SPMD_LP is a build flag that is used to enable support for SPMD logical partitions. Note that the approach chosen is to keep SPMD and SPMC logical partition support separate, as opposed to extend the existing SPMC logical partition support since the code would need to have a number of ifdefs and the interactions with various build options such as SPMC_AT_EL3 needs to be accounted for, which would make code more complicated.
Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I9642ddbf6ea26dd3f4a283baec598d61c07e3661
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6d41f123 |
| 29-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "jc/cpu_feat" into integration
* changes: feat(cpufeat): enable FEAT_SVE for FEAT_STATE_CHECKED feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED
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45007acd |
| 06-Mar-2023 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED
Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting feat_sme_supported() into an ID register reading function and a second fun
feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED
Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting feat_sme_supported() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we do SME specific setup.
Change the FVP platform default to the now supported dynamic option (=2),so the right decision can be made by the code at runtime.
Change-Id: Ida9ccf737db5be20865b84f42b1f9587be0626ab Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
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3015267f |
| 12-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(sme): enable SME functionality" into integration
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dc78e62d |
| 08-Jul-2021 |
johpow01 <john.powell@arm.com> |
feat(sme): enable SME functionality
This patch adds two new compile time options to enable SME in TF-A: ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and secure worlds respectively.
feat(sme): enable SME functionality
This patch adds two new compile time options to enable SME in TF-A: ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and secure worlds respectively. Setting ENABLE_SME_FOR_NS=1 will enable SME for non-secure worlds and trap SME, SVE, and FPU/SIMD instructions in secure context. Setting ENABLE_SME_FOR_SWD=1 will disable these traps, but support for SME context management does not yet exist in SPM so building with SPD=spmd will fail.
The existing ENABLE_SVE_FOR_NS and ENABLE_SVE_FOR_SWD options cannot be used with SME as it is a superset of SVE and will enable SVE and FPU/SIMD along with SME.
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Iaaac9d22fe37b4a92315207891da848a8fd0ed73
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a6ab1ae3 |
| 21-Aug-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: second
Merge changes from topic "spm-secondary-cores" into integration
* changes: SPMC: embed secondary core ep info into to SPMC context SPMC: manifest changes to support multicore boot SPMD: secondary cores PM on and off SPD hooks relayed to SPMC SPMD: handle SPMC message to register secondary core entry point SPMD: introduce SPMC to SPMD messages SPMD: register the SPD PM hooks SPMD: add generic SPD PM handlers SPMD: enhance SPMC internal boot states SPMD: entry point info get helper
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a334c4e6 |
| 28-Oct-2019 |
Olivier Deprez <olivier.deprez@arm.com> |
SPMD: register the SPD PM hooks
Change-Id: If88d64c0e3d60accd2638a55f9f3299ec700a8c8 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
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63aa4094 |
| 11-Feb-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0 spec SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP SPMD: add support for an example SPM core manifest SPMD: add SPCI Beta 0 specification header file
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bdd2596d |
| 11-Oct-2019 |
Achin Gupta <achin.gupta@arm.com> |
SPMD: add SPM dispatcher based upon SPCI Beta 0 spec
This patch adds a rudimentary SPM dispatcher component in EL3. It does the following:
- Consumes the TOS_FW_CONFIG to determine properties of th
SPMD: add SPM dispatcher based upon SPCI Beta 0 spec
This patch adds a rudimentary SPM dispatcher component in EL3. It does the following:
- Consumes the TOS_FW_CONFIG to determine properties of the SPM core component - Initialises the SPM core component which resides in the BL32 image - Implements a handler for SPCI calls from either security state. Some basic validation is done for each call but in most cases it is simply forwarded as-is to the "other" security state.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I7d116814557f7255f4f4ebb797d1619d4fbab590
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