| #
a52662ed |
| 25-Jul-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "ffa_mem_perm_get_update" into integration
* changes: feat(spm): update MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 interface feat(el3-spmc): update FFA_MEM_PERM_GET interface
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| #
127bd5b1 |
| 19-Oct-2024 |
Levi Yun <yeoreum.yun@arm.com> |
feat(spm): update MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 interface
Update MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 interface correspondant to FF-A v1.3 memory management protocol's FFA_MEM_PERM_GET interfac
feat(spm): update MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 interface
Update MM_SP_MEMORY_ATTRIBUTES_GET_AARCH64 interface correspondant to FF-A v1.3 memory management protocol's FFA_MEM_PERM_GET interface [0].
This adds one input/output parameter with page_count to set search range and get the range having same permssion from base_va.
This change is backward compatible.
Links: https://developer.arm.com/documentation/den0140/latest/ Change-Id: Ib1b19dd433ad018f0c39af3a9ac8dda41358fb02 Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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| #
63696d00 |
| 09-Jul-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(smccc): introduce TPM Start SMC" into integration
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| #
96546b5c |
| 02-Dec-2024 |
Manish Pandey <manish.pandey2@arm.com> |
feat(smccc): introduce TPM Start SMC
To support TPM start method compatible with pre-FFA configuration (to support SPM_MM) introduce an SMC FID el3 vendor specific range. This SMC is forwarded to SP
feat(smccc): introduce TPM Start SMC
To support TPM start method compatible with pre-FFA configuration (to support SPM_MM) introduce an SMC FID el3 vendor specific range. This SMC is forwarded to SPM_MM module which converts into a MM_COMMUNICATE to interact with Secure partition.
TPM Start method is mentioned in TCG ACPI spec section 3.3.1 https://trustedcomputinggroup.org/wp-content/uploads/TCG-ACPI-Specification-Version-1.4-Revision-15_pub.pdf
As this patch introduces a new sub service, increment minor version of Vendor EL3 service.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I61698018e6bc33c9b389ac905fe158810af21bfa
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90a701a9 |
| 11-Apr-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(spm-mm): prevent excessive racing" into integration
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48426cff |
| 03-Apr-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(spm-mm): prevent excessive racing
The current code does the following:
sp_state_wait_switch: lock() if (status == 0) status = 1 unlock()
[critical section]
sp_state_set: lock() status
fix(spm-mm): prevent excessive racing
The current code does the following:
sp_state_wait_switch: lock() if (status == 0) status = 1 unlock()
[critical section]
sp_state_set: lock() status = 0 unlock()
One core will obtain the status for itself and then all other cores will get the lock, see the status is not available, release the lock, and try again. However, when there are many cores this causes a lot of lock contention and the original core is racing to obtain the lock to release the status. This starves the holder of the lock, resulting in an apparent deadlock, although given enough time it will pass.
Hold the lock throughout to prevent this.
Also make the functions static as they are never exported and drop sp_state_try_switch() as its unused and would not work anymore.
Change-Id: I0861d04ed95437e4ca9f203d9e79a6296b1ead56 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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4b6e4e61 |
| 20-Aug-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "mp/simd_ctxt_mgmt" into integration
* changes: feat(fvp): allow SIMD context to be put in TZC DRAM docs(simd): introduce CTX_INCLUDE_SVE_REGS build flag feat(fvp): ad
Merge changes from topic "mp/simd_ctxt_mgmt" into integration
* changes: feat(fvp): allow SIMD context to be put in TZC DRAM docs(simd): introduce CTX_INCLUDE_SVE_REGS build flag feat(fvp): add Cactus partition manifest for EL3 SPMC chore(simd): remove unused macros and utilities for FP feat(el3-spmc): support simd context management upon world switch feat(trusty): switch to simd_ctx_save/restore apis feat(pncd): switch to simd_ctx_save/restore apis feat(spm-mm): switch to simd_ctx_save/restore APIs feat(simd): add rules to rationalize simd ctxt mgmt feat(simd): introduce simd context helper APIs feat(simd): add routines to save, restore sve state feat(simd): add sve state to simd ctxt struct feat(simd): add data struct for simd ctxt management
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| #
e6e34868 |
| 18-Jun-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
feat(spm-mm): switch to simd_ctx_save/restore APIs
This patch demonstrates the trivial changes to transparently switch the fpregs_context_* helpers to simd_ctx_* helpers.
Signed-off-by: Madhukar Pa
feat(spm-mm): switch to simd_ctx_save/restore APIs
This patch demonstrates the trivial changes to transparently switch the fpregs_context_* helpers to simd_ctx_* helpers.
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> Signed-off-by: Okash Khawaja <okash@google.com> Change-Id: I14bda6bd0ead1f34a570b59be8dec3ac40891c20
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4bd8c929 |
| 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I1bfa797e,I0ec7a70e into integration
* changes: fix(tree): correct some typos fix(rockchip): use semicolon instead of comma
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1b491eea |
| 13-Feb-2023 |
Elyes Haouas <ehaouas@noos.fr> |
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
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| #
0dc2b516 |
| 13-May-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ns/save_fpregs_context" into integration
* changes: feat(sgi): enable fpregs context save and restore feat(spm_mm): add support to save and restore fp regs
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15dd6f19 |
| 19-Apr-2022 |
Nishant Sharma <nishant.sharma@arm.com> |
feat(spm_mm): add support to save and restore fp regs
Add the support to save Nwd's floating point registers before switching to SEL0 and then restore it after coming out of it. Emit a warning messa
feat(spm_mm): add support to save and restore fp regs
Add the support to save Nwd's floating point registers before switching to SEL0 and then restore it after coming out of it. Emit a warning message if SPM_MM is built with CTX_INCLUDE_FPREGS == 0
There is no need to save FP registers of SEL0 because secure partitions run to completion.
This change is used to prevent context corruption if secure partition enabled and Nwd decide to use floating point registers.
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com> Change-Id: I1eea16ea2311a4f00a806ea72c118752821b9abb
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65b13bac |
| 22-Apr-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmc): add support for direct req/resp feat(spmc): add support for handling FFA_ERROR ABI feat(spmc): add support for F
Merge changes from topic "ffa_el3_spmc" into integration
* changes: feat(spmc): add support for direct req/resp feat(spmc): add support for handling FFA_ERROR ABI feat(spmc): add support for FFA_MSG_WAIT feat(spmc): add function to determine the return path from the SPMC feat(spmd): enable handling of FF-A SMCs with the SPMC at EL3 feat(spmd): update SPMC init flow to use EL3 implementation feat(spmc): add FF-A secure partition manager core feat(spmc): prevent read only xlat tables with the EL3 SPMC feat(spmc): enable building of the SPMC at EL3 refactor(spm_mm): reorganize secure partition manager code
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| #
b61d94a1 |
| 19-Dec-2021 |
Marc Bonnici <marc.bonnici@arm.com> |
refactor(spm_mm): reorganize secure partition manager code
In preparation for adding the EL3 SPMC configuration as defined in the FF-A specification, restructure the existing SPM_MM code.
With this
refactor(spm_mm): reorganize secure partition manager code
In preparation for adding the EL3 SPMC configuration as defined in the FF-A specification, restructure the existing SPM_MM code.
With this restructuring of the code, the 'spm_mm' directory is renamed as 'spm' and the code inside has been split into two sub-directories named 'common' and 'spm_mm'. The code in 'spm_mm' directory contains the code that implements the MM interface. In subsequent patches, the 'spmc' directory will be introduced under the 'spm' directory providing the code that implements the 'FF-A' interface.
Currently the common functionality for S-EL1 partitions is limited to assembler functions to enter and exit an SP synchronously.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com> Change-Id: I37739b9b53bc68e151ab5c1c0c6a15b3ee362241
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