| 18283e6d | 14-Aug-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(versal-net): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to pl011, regardless of the user-specified VERSAL_NET_CONSOLE value. This causes a buil
fix(versal-net): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to pl011, regardless of the user-specified VERSAL_NET_CONSOLE value. This causes a build requested with VERSAL_NET_CONSOLE=pl011_1 to register both pl011_1 and pl011 as boot and runtime consoles. If the hardware is connected only to UART1, this causes TF-A to hang when UART0 is selected as the runtime console, since it waits indefinitely on the transmit FIFO. The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to the same value as VERSAL_NET_CONSOLE.
Change-Id: Icad043a61f9d90480a8aceab701a5791d26e3d70 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
show more ...
|
| 0701792f | 12-Aug-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(versal): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to pl011, regardless of the user-specified VERSAL_CONSOLE value. This causes a build reques
fix(versal): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to pl011, regardless of the user-specified VERSAL_CONSOLE value. This causes a build requested with VERSAL_CONSOLE=pl011_1 to register both pl011_1 and pl011 as boot and runtime consoles. If the hardware is connected only to UART1, this causes TF-A to hang when UART0 is selected as the runtime console, since it waits indefinitely on the transmit FIFO. The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to the same value as VERSAL_CONSOLE.
Change-Id: I7aeedb04040ea4ab4b8aecde98af5cc39df09c1a Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
show more ...
|
| 25463503 | 14-Aug-2025 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(zynqmp): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value. This causes a build req
fix(zynqmp): runtime console in debug mode
Whenever DEBUG is set to 1, the Makefile forces CONSOLE_RUNTIME to cadence1, regardless of the user-specified ZYNQMP_CONSOLE value. This causes a build requested with ZYNQMP_CONSOLE= cadence1 to register both cadence1 and cadence as boot and runtime consoles. If the hardware is connected only to UART1, this causes TF-A to hang when UART0 is selected as the runtime console, since it waits indefinitely on the transmit FIFO. The fix ensures that, in a DEBUG build, CONSOLE_RUNTIME defaults to the same value as ZYNQMP_CONSOLE.
Change-Id: Ieff6adf4c6c30e07b8c7309c4835dcb32dcf9373 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
show more ...
|
| 4e89096a | 30-Jun-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): match function type as its declared
This corrects the MISRA violation C2012-8.3: matching the type of function definition as per its declaration.
Change-Id: Ibeaee37a30d02e9a7638c94705
fix(versal): match function type as its declared
This corrects the MISRA violation C2012-8.3: matching the type of function definition as per its declaration.
Change-Id: Ibeaee37a30d02e9a7638c94705dfa4b433a35bf6 Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| 325949f1 | 06-Feb-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): switch case has only one confirming clause
This corrects the MISRA violation C2012-16.6: Use if statement when switch statement has only one clause. This helps to prevent other misra-c
fix(versal): switch case has only one confirming clause
This corrects the MISRA violation C2012-16.6: Use if statement when switch statement has only one clause. This helps to prevent other misra-c issue i.e., 16.1 and 16.3 and this doesn't affect the functionality of the code.
Change-Id: Ie4ce39abb450cc45303732ec48b5c2e4ef5561e4 Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| 5d8831c2 | 06-Feb-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a d
fix(versal): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category
Change-Id: I83294b6a74378a927a639777ac7261a1375e13a1 Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| f7092652 | 28-Jan-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): replace ull with ULL to fix misra violation
This corrects the MISRA violation C2012-7.3: The issue is because the numeric literal "1ull" uses a lowercase 'l' to specify its type. 'l' ca
fix(versal): replace ull with ULL to fix misra violation
This corrects the MISRA violation C2012-7.3: The issue is because the numeric literal "1ull" uses a lowercase 'l' to specify its type. 'l' can be visually ambiguous when placed next to digits, especially with '1', Replacing "ull" with "ULL" is avoids the confusion and fixes the issue.
Change-Id: I204d90316ea3bfec314c284284a423618274c87b Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| c1b0a52b | 27-Jan-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value/data/return type of a variable/function in an expression shall not be assigned to an object
fix(versal): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value/data/return type of a variable/function in an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
Change-Id: I28b41e74d4c32829faaf786234c12207b5b32f29 Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| 5b51d4de | 27-Jan-2025 |
Saivardhan Thatikonda <saivardhan.thatikonda@amd.com> |
fix(versal): match function declaration with its definition
This corrects the MISRA violation C2012-4.6: The function declaration shall be match with whose definition. In this case, 'int32_t' needs
fix(versal): match function declaration with its definition
This corrects the MISRA violation C2012-4.6: The function declaration shall be match with whose definition. In this case, 'int32_t' needs to be replaced with 'int' in the function declaration.
Change-Id: I15f1f5f93a904c057af86da4c22d4fd2b9c7a7eb Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>
show more ...
|
| 75170704 | 29-Jul-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
The GICv3 driver has 2 methods of discovering the redistributors: a) via setting gicr_base - done at boot and assumes
refactor(gicv3): clarify redistributor base address usage with USE_GIC_DRIVER=3
The GICv3 driver has 2 methods of discovering the redistributors: a) via setting gicr_base - done at boot and assumes all GICR frames are contiguous. This is the original method.
b) via gicv3_rdistif_probe() - called from platform code and requires gicr_base == 0. It relaxes the requirement for frames to be contiguous, like in a multichip configuration, and defers the discovery to core bringup. This was introduced later.
Configurations possible with option a) are also possible with option b) with only slightly different behaviour. USE_GIC_DRIVER=3 inherited option b) from plat_gicv3_base.c and as such option a) is unusable. However, it is unclear from code how this should be used. Clarify this by requiring platforms initialise with gic_set_gicr_frames() and adding relevant comments.
Also rename plat_arm_override_gicr_frames() to gic_set_gicr_frames() as this is not plat arm specific and a part of the generic GIC driver.
Change-Id: I61d77211f8e65dc54cf9904069b500d26a06b5a5 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
show more ...
|
| 8a4a551c | 30-Jun-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(versal-net): use the generic GIC driver
With the introduction of USE_GIC_DRIVER, platforms no longer have to do their own GIC management for basic PSCI-related operations. Previously a half
refactor(versal-net): use the generic GIC driver
With the introduction of USE_GIC_DRIVER, platforms no longer have to do their own GIC management for basic PSCI-related operations. Previously a half-measure was possible by using plat_gicv3_base.c to get semi-generic helpers which versal_net uses.
Since USE_GIC_DRIVER is based on plat_gicv3_base.c, convert the platform to use that so its code is more generic. Expected benefits are slightly better performance around calling the gic hooks on cpu suspend and less platform code.
Change-Id: I8e8a92fd4111e4a83c7a34bc5255d924bc54e769 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
show more ...
|