| #
208ebe7c |
| 23-Jan-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "xilinx: versal: PLM to ATF handover" into integration
|
| #
31ce893e |
| 23-Jan-2020 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
xilinx: versal: PLM to ATF handover
Parse the parameter structure the PLM populates, to populate the
bl32 and bl33 image structures.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xili
xilinx: versal: PLM to ATF handover
Parse the parameter structure the PLM populates, to populate the
bl32 and bl33 image structures.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I317072d1086f6cc6f90883c1b8b6d086ff57b443
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|
| #
f44d291f |
| 22-Jan-2020 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "add-versal-soc-support" into integration
* changes:
plat: xilinx: Move pm_client.h to common directory
plat: xilinx: versal: Make silicon default build target
xilinx:
Merge changes from topic "add-versal-soc-support" into integration
* changes:
plat: xilinx: Move pm_client.h to common directory
plat: xilinx: versal: Make silicon default build target
xilinx: versal: Wire silicon default setup
versal: Increase OCM memory size for DEBUG builds
plat: xilinx: versal: Dont set IOU switch clock
arm64: versal: Adjust cpu clock for versal virtual
xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI call
plat: versal: Add Get_ChipID API
plat: xilinx: versal: Add load Pdi API support
xilinx: versal: Add feature check API
xilinx: versal: Implement set wakeup source for client
plat: xilinx: versal: Add GET_CALLBACK_DATA function
xilinx: versal: Add PSCI APIs for system shutdown & reset
xilinx: versal: Add PSCI APIs for suspend/resume
xilinx: versal: Remove no_pmc ops to ON power domain
xilinx: versal: Add set wakeup source API
xilinx: versal: Add client wakeup API
xilinx: versal: Add query data API
xilinx: versal: Add request wakeup API
xilinx: versal: Add PM_INIT_FINALIZE API for versal
xilinx: versal: Add support of PM_GET_TRUSTZONE_VERSION API
xilinx: versal: enable ipi mailbox service
xilinx: move ipi mailbox svc to xilinx common
plat: xilinx: versal: Implement PM IOCTL API
xilinx: versal: Implement power down/restart related EEMI API
xilinx: versal: Add SMC handler for EEMI API
xilinx: versal: Implement PLL related PM APIs
xilinx: versal: Implement clock related PM APIs
xilinx: versal: Implement pin control related PM APIs
xilinx: versal: Implement reset related PM APIs
xilinx: versal: Implement device related PM APIs
xilinx: versal: Add support for suspend related APIs
xilinx: versal: Add get_api_version support
xilinx: Add support to send PM API to PMC using IPI for versal
plat: xilinx: versal: Move versal_def.h to include directory
plat: xilinx: versal: Move versal_private.h to include directory
plat: xilinx: zynqmp: Use GIC framework for warm restart
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| #
7b9f0cfd |
| 10-Jul-2019 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
plat: xilinx: versal: Make silicon default build target
This patch makes default build target as silicon instead of QEMU.
The default can be overwritten by specifying it through build flag
VERSAL_PL
plat: xilinx: versal: Make silicon default build target
This patch makes default build target as silicon instead of QEMU.
The default can be overwritten by specifying it through build flag
VERSAL_PLATFORM.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ia4cb1df1f206db3e514e8ce969acca875e973ace
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|
| #
5a8ffeab |
| 27-Feb-2019 |
Tejas Patel <tejas.patel@xilinx.com> |
xilinx: versal: Add PSCI APIs for suspend/resume
Add following APIs in plat_psci to support suspend resume:
- versal_pwr_domain_off
- versal_pwr_domain_suspend
- versal_pwr_domain_suspend_finish
- v
xilinx: versal: Add PSCI APIs for suspend/resume
Add following APIs in plat_psci to support suspend resume:
- versal_pwr_domain_off
- versal_pwr_domain_suspend
- versal_pwr_domain_suspend_finish
- versal_validate_power_state
- versal_get_sys_suspend_power_state
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ife908a45f32e2037c9c19e13211a8e4b373b8342
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| #
6e2f0d10 |
| 21-Jan-2019 |
Wendy Liang <wendy.liang@xilinx.com> |
xilinx: versal: enable ipi mailbox service
Enable IPI mailbox service on versal platform.
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Chang
xilinx: versal: enable ipi mailbox service
Enable IPI mailbox service on versal platform.
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Idfba3bcd7e7b868133da0bc1d03c96db2d0bb1b7
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| #
95794c73 |
| 08-Jan-2019 |
Tejas Patel <tejas.patel@xilinx.com> |
xilinx: versal: Add get_api_version support
Add support for EEMI API get_api_verion.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id:
xilinx: versal: Add get_api_version support
Add support for EEMI API get_api_verion.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ic1ef90a194ae6164994a7fc5d8ff0b7b192636fe
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| #
c73a90e5 |
| 14-Dec-2018 |
Tejas Patel <tejas.patel@xilinx.com> |
xilinx: Add support to send PM API to PMC using IPI for versal
Port ZynqMP PM services for versal to send PM APIs to PMC
using IPI.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by
xilinx: Add support to send PM API to PMC using IPI for versal
Port ZynqMP PM services for versal to send PM APIs to PMC
using IPI.
Signed-off-by: Tejas Patel <tejas.patel@xilinx.com>
Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: I27a52faf27f1a2919213498276a6885a177cb6da
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| #
39c92b62 |
| 28-Jun-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge changes from topic "av/console-port" into integration
* changes:
qemu: use new console interface in aarch32
warp7: remove old console from makefile
Remove MULTI_CONSOLE_API flag and refe
Merge changes from topic "av/console-port" into integration
* changes:
qemu: use new console interface in aarch32
warp7: remove old console from makefile
Remove MULTI_CONSOLE_API flag and references to it
Console: removed legacy console API
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| #
5b6ebeec |
| 04-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.co
Remove MULTI_CONSOLE_API flag and references to it
The new API becomes the default one.
Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| #
8a08e272 |
| 04-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1920 from ambroise-arm/av/deprecated
Remove deprecated interfaces
|
| #
2cc97771 |
| 27-Mar-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove deprecated plat_crash_console_*
The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.
Implemented placeholders for platforms
Remove deprecated plat_crash_console_*
The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.
Implemented placeholders for platforms that were missing helpers.
Change-Id: Iea60b6f851956916e421dfd8c34a62d96eb9148e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| #
e07666de |
| 12-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1605 from sivadur/integration
Add support new Xilinx Versal ACAP platform
|
| #
f91c3cb1 |
| 25-Sep-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Sc
arm64: versal: Add support for new Xilinx Versal ACAPs
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar
Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with
leading-edge memory and interfacing technologies to deliver powerful
heterogeneous acceleration for any application. The Versal AI Core series has
five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm
Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time
processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines
optimized for high-precision floating point with low latency.
This patch adds Virtual QEMU platform support for
this SoC "versal_virt".
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
|