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1064bc6c |
| 22-Jan-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "idling-during-subsystem-restart" into integration
* changes: fix(xilinx): add console_flush() before shutdown fix(xilinx): fix sending sgi to linux feat(xilinx): add
Merge changes from topic "idling-during-subsystem-restart" into integration
* changes: fix(xilinx): add console_flush() before shutdown fix(xilinx): fix sending sgi to linux feat(xilinx): add new state to identify cpu power down feat(xilinx): request cpu power down from reset feat(xilinx): power down all cores on receiving cpu pwrdwn req feat(xilinx): add handler for power down req sgi irq feat(xilinx): add wrapper to handle cpu power down req fix(versal-net): use arm common GIC handlers fix(xilinx): rename macros to align with ARM
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| #
ade92a64 |
| 25-Apr-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
feat(xilinx): add handler for power down req sgi irq
On receiving CPU power down callback, TF-A raises SGI interrupt to all active cores to power down each active cores. Add handler for this SGI IRQ
feat(xilinx): add handler for power down req sgi irq
On receiving CPU power down callback, TF-A raises SGI interrupt to all active cores to power down each active cores. Add handler for this SGI IRQ.
By default TF-A uses SGI 6 for CPU power down request. This can be configurable through CPU_PWRDWN_SGI build flag.
e.g., If user wants to use SGI 7 instead of SGI 6 then provide build flag CPU_PWRDWN_SGI=7
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Id0df32187d1de3f0af4486eb4d4930cb3ab01dbd
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| #
16cb3be8 |
| 24-May-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_smcc_soc_id" into integration
* changes: feat(versal-net): add support for SMCC ARCH SOC ID feat(versal): add support for SMCC ARCH SOC ID refactor(versal-net):
Merge changes from topic "xlnx_smcc_soc_id" into integration
* changes: feat(versal-net): add support for SMCC ARCH SOC ID feat(versal): add support for SMCC ARCH SOC ID refactor(versal-net): move macros to common header feat(xilinx): add support to get chipid
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| #
4265bcae |
| 12-May-2023 |
Akshay Belsare <akshay.belsare@amd.com> |
refactor(versal-net): move macros to common header
Move the macros to common header from platform specific folder, so that the same macros can be re-used in other platforms.
Change-Id: I355b024f5e8
refactor(versal-net): move macros to common header
Move the macros to common header from platform specific folder, so that the same macros can be re-used in other platforms.
Change-Id: I355b024f5e870c6fc104598bc571dbaa29503ae2 Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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