| 592ede25 | 16-Jan-2020 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Remove indirect structure of const data
The 'info' structure contained what is only static data for this
implementation of TI-SCI. Remove this indirection and remove the
str
ti: k3: drivers: ti_sci: Remove indirect structure of const data
The 'info' structure contained what is only static data for this
implementation of TI-SCI. Remove this indirection and remove the
struct.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I2328fddf388bf7d56a56bd673c080e78c86fe072
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| 48d6b264 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove coherency workaround for AM65x
We previously left our caches on during power-down to prevent any
non-caching accesses to memory that is cached by other cores. Now with
the las
ti: k3: common: Remove coherency workaround for AM65x
We previously left our caches on during power-down to prevent any
non-caching accesses to memory that is cached by other cores. Now with
the last accessed areas all being marked as non-cached by
USE_COHERENT_MEM we can rely on that to workaround our interconnect
issues. Remove the old workaround.
Change-Id: Idadb7696d1449499d1edff4f6f62ab3b99d1efb7
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| 16a755f3 | 10-May-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Set L2 latency on A72 cores
The Cortex-A72 based cores on K3 platforms can be clocked fast
enough that an extra latency cycle is needed to ensure correct
L2 access. Set the latency h
ti: k3: common: Set L2 latency on A72 cores
The Cortex-A72 based cores on K3 platforms can be clocked fast
enough that an extra latency cycle is needed to ensure correct
L2 access. Set the latency here for all A72 cores.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Id534316dec1c1f326908efbfd964f219cda7386a
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| ff180993 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Mark sections for AM65x coherency workaround
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is no
ti: k3: common: Mark sections for AM65x coherency workaround
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is not either. Mark it off to keep it separated from the rest of
the PSCI implementation.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef
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| ebfb0709 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Allow USE_COHERENT_MEM for K3
To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.
Signed-off-by: An
ti: k3: common: Allow USE_COHERENT_MEM for K3
To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I1c05477a97646ac73846a711bc38d3746628d847
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| 64752374 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Fix RO data area size calculation
The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.
ti: k3: common: Fix RO data area size calculation
The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.
Note, this was noticed at a glance thanks to the new aligned formating
of this table.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I994022ac9fc95dc5e37a420714da76081c61cce7
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| 282514cf | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove unused STUB macro
This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Cha
ti: k3: common: Remove unused STUB macro
This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ida33f92fe3810a89e6e51faf6e93c1d2ada1a2ee
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| 71a35273 | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we er
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we error out. We
can also assume this message is a stale message left in the queue, in
this case we can read in the next message and check again for our
message. Switch to doing that here. We only retry a set number of times
so we don't lock the system if our message is actually lost and will
never show up.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I6c8186ccc45e646d3ba9d431f7d4c451dcd70c5c
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| 7a469035 | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check f
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check for this same number to detect response mismatches.
Start this at 0 and increase it by one for each message sent, even ones
that do not request or wait for a response as one may still be delivered
in some cases and we want to detect this.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I72b4d1ef98bf1c1409d9db9db074af8dfbcd83ea
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| fb98ca5a | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: sec_proxy: Use direction definitions
The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.
Signed-off-by:
ti: k3: drivers: sec_proxy: Use direction definitions
The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ia3cf9413cd23af476bb5d2e6d70bee15234cbd11
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| 883eab2b | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Align elements of map region table
This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed b
ti: k3: common: Align elements of map region table
This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed but this section very important to get right so make readability
the priority here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I2432deda05d4502b3478170296b5da43f26ad8e6
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