| #
01855239 |
| 16-Jan-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "ti-k3-checks-and-refactor" into integration
* changes:
fix(ti): fix typo in boot authentication message name
refactor(ti): remove empty validate_ns_entrypoint function
Merge changes from topic "ti-k3-checks-and-refactor" into integration
* changes:
fix(ti): fix typo in boot authentication message name
refactor(ti): remove empty validate_ns_entrypoint function
refactor(ti): use console_set_scope() rather than empty function hack
refactor(ti): factor out common board code into common files
feat(ti): add PSCI system_off support
feat(ti): do not handle EAs in EL3
feat(ti): set snoop-delayed exclusive handling on A72 cores
feat(ti): disable L2 dataless UniqueClean evictions
feat(ti): set L2 cache ECC and and parity on A72 cores
feat(ti): set L2 cache data ram latency on A72 cores to 4 cycles
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| #
4db96de4 |
| 11-Nov-2022 |
Andrew Davis <afd@ti.com> |
refactor(ti): factor out common board code into common files
Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: Ibf7328418c5285a64608b80e7c430a8dee64fb1d
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| #
0bdef264 |
| 16-Nov-2022 |
Andrew Davis <afd@ti.com> |
feat(ti): add PSCI system_off support
Send a TI-SCI control message to system firmware to power down the board.
Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I6b8fa64baa94da078db82fc8e115630c
feat(ti): add PSCI system_off support
Send a TI-SCI control message to system firmware to power down the board.
Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I6b8fa64baa94da078db82fc8e115630c9f200b3d
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| #
045b500e |
| 07-Sep-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(ti-k3): add support for J784S4 SoCs" into integration
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| #
4a566b26 |
| 22-Aug-2022 |
Hari Nagalla <hnagalla@ti.com> |
feat(ti-k3): add support for J784S4 SoCs
The J784S4 SoC has two quad Cortex-A72 core clusters. This is the first
SoC in the K3 family with Quad cores in a A-72 cluster. So, a new board
configuration
feat(ti-k3): add support for J784S4 SoCs
The J784S4 SoC has two quad Cortex-A72 core clusters. This is the first
SoC in the K3 family with Quad cores in a A-72 cluster. So, a new board
configuration is introduced to support quad core clusters on the J784S4
SoC of the K3 family of devices.
See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
for further details: http://www.ti.com/lit/zip/spruj52
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Change-Id: I0ed1f14ab32a56ae06e3df3161ace4597d14a48d
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