refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/

refactor(st): move macros to common folder

As these definitions will be the same for STM32MP1 and STM32MP2, move
PLATFORM_MTD_MAX_PAGE_SIZE and DWL_BUFFER_SIZE macro definition to the
file: plat/st/common/include/stm32mp_common.h

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I480669d009d15fec753298f47b136e34fa240132

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refactor(stm32mp1): remove unused macros

PLAT_STM32MP_NS_IMAGE_OFFSET and PLAT_EMMC_BOOT_SSBL_OFFSET macros should
have been removed with patch [1].

[1] 981b9dcb87 ("refactor(stm32mp1): remove STM3

refactor(stm32mp1): remove unused macros

PLAT_STM32MP_NS_IMAGE_OFFSET and PLAT_EMMC_BOOT_SSBL_OFFSET macros should
have been removed with patch [1].

[1] 981b9dcb87 ("refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE")

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ice98c43c0257041226525199be06134fde8466c5

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Merge "feat(stm32mp1): only fuse monotonic counter on closed devices" into integration

feat(stm32mp1): only fuse monotonic counter on closed devices

The fused monotonic counter is checked by the ROM bootloader. The ROM
bootloader won't allow booting images build with a lower
STM32_TF_

feat(stm32mp1): only fuse monotonic counter on closed devices

The fused monotonic counter is checked by the ROM bootloader. The ROM
bootloader won't allow booting images build with a lower
STM32_TF_VERSION value.

On non-closed devices a user can easily circumvent this. But it is
annoying for a developer when open development hardware gets the counter
value fused.

Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Change-Id: Ie52561368a3178de9d9a44b9d089664241452651

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feat(stm32mp2): add BSEC and OTP support

Add compilation and initialization of BSEC peripheral, to access OTP
fuses. Add the definition of OTP fuses.

Signed-off-by: Yann Gautier <yann.gautier@st.co

feat(stm32mp2): add BSEC and OTP support

Add compilation and initialization of BSEC peripheral, to access OTP
fuses. Add the definition of OTP fuses.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If6403838b1e2c04c59effc8545b381aced5f7cda

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fix(stm32mp2): add missing include

Without #include <plat/common/platform.h>, we have the following warning
with sparse:
plat/st/stm32mp2/bl2_plat_setup.c:15:6: warning: symbol
'bl2_el3_early_platf

fix(stm32mp2): add missing include

Without #include <plat/common/platform.h>, we have the following warning
with sparse:
plat/st/stm32mp2/bl2_plat_setup.c:15:6: warning: symbol
'bl2_el3_early_platform_setup' was not declared. Should it be static?
plat/st/stm32mp2/bl2_plat_setup.c:23:6: warning: symbol
'bl2_platform_setup' was not declared. Should it be static?
plat/st/stm32mp2/bl2_plat_setup.c:27:6: warning: symbol
'bl2_el3_plat_arch_setup' was not declared. Should it be static?

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I18f9265c1eef1f8e8e0eac3d6c37a959e5c9e8b6

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feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are a

feat(st): do not directly call BSEC functions in common code

When STM32MP2 boots on Cortex-M33, the Cortex-A35 do no more have access
to BSEC peripheral. New static inline stm32_otp_* wrappers are added,
which just redirect to BSEC functions.

While at it remove a useless bsec.h include.

Change-Id: Ie0f917c02e48acf456634f455dae41805bf6adbf
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(st): use stm32_get_otp_value_from_idx() in BL31

The shadowing of the OTP is done in BL2.
As for BL32 on AARCH32 systems, stm32_get_otp_value_from_idx()
should also use bsec_read_otp() in BL31.

feat(st): use stm32_get_otp_value_from_idx() in BL31

The shadowing of the OTP is done in BL2.
As for BL32 on AARCH32 systems, stm32_get_otp_value_from_idx()
should also use bsec_read_otp() in BL31.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib406cfc154339e6d3cde3c925bc6e9416d77b689

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refactor(st): update test for closed chip

The function stm32mp_is_closed_device() is replaced with
stm32mp_check_closed_device(), which return an uint32_t, either
STM32MP_CHIP_SEC_OPEN or STM32MP_CH

refactor(st): update test for closed chip

The function stm32mp_is_closed_device() is replaced with
stm32mp_check_closed_device(), which return an uint32_t, either
STM32MP_CHIP_SEC_OPEN or STM32MP_CHIP_SEC_CLOSED.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ie0790cdc36c4b6522083bc1f0e7c38e8061e6adf

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refactor(st-bsec): improve BSEC driver

In order to ease the introduction of a new BSEC3 driver for STM32MP25,
the BSEC2 driver is reworked. Unused functions are removed. The
bsec_base global variabl

refactor(st-bsec): improve BSEC driver

In order to ease the introduction of a new BSEC3 driver for STM32MP25,
the BSEC2 driver is reworked. Unused functions are removed. The
bsec_base global variable is removed in favor of the macro BSEC_BASE.
A rework is also done around function checking the state of BSEC.

Change-Id: I1ad76cb67333ab9a8fa1d65db34d74a712bf1190
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp2): put back core 1 in wfi after debugger's halt

The core 1 is put in wfi for pen holding. If a debugger halts the
core, it causes the core to exit from wfi.

Let the core to jump back i

feat(stm32mp2): put back core 1 in wfi after debugger's halt

The core 1 is put in wfi for pen holding. If a debugger halts the
core, it causes the core to exit from wfi.

Let the core to jump back in wfi when the debugger resumes the
core's execution.

Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Change-Id: I9b5607b05cdcde905dc4047af8d6f1292d53d701

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feat(stm32mp2): add plat_my_core_pos

This function is required, at least for bakery locks.

Change-Id: I28906c50e0a0ebff5d387a424247513ec1a599fc
Signed-off-by: Yann Gautier <yann.gautier@st.com>

fix(stm32mp2): correct early/crash console init

The former code, using x2 register, was removing the LPEN bit from UART
config register. So the UART clock is stopped as soon as the CA35 is in
CSleep

fix(stm32mp2): correct early/crash console init

The former code, using x2 register, was removing the LPEN bit from UART
config register. So the UART clock is stopped as soon as the CA35 is in
CSleep. It was then displaying crap in Linux console.
The ands check instruction is replaced with a clearer tst instruction
directly with the bit to be tested.

Change-Id: I8a2b3ab195981dee2962e0c2f5d501d5933c17f4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge "feat(st): update STM32MP DT files" into integration

Merge changes from topic "st_remove_shm" into integration

* changes:
docs(stm32mp15): mark STM32MP15_OPTEE_RSV_SHM deprecated
feat(stm32mp15): disable OP-TEE shared memory

Merge "fix(st): properly check LOADADDR" into integration

Merge changes from topic "gcc_linker_aarch32" into integration

* changes:
feat(st): support gcc as linker
fix(build): allow gcc linker on Aarch32 platforms

fix(st): properly check LOADADDR

LOADADDR variable is retrieved from line starting with RAM in map file.
But if the build path contains RAM, this keywords will appear several
times and the grep will

fix(st): properly check LOADADDR

LOADADDR variable is retrieved from line starting with RAM in map file.
But if the build path contains RAM, this keywords will appear several
times and the grep will fail. Correct that by really checking the line
starting with RAM thanks to grep '^RAM'.

Change-Id: I2ce23edb5255028b1a56ba45c16569a42ae21ae2
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/328648

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feat(stm32mp15): disable OP-TEE shared memory

OP-TEE manages its own memory, and can open some areas through TZC400.
There is no need to configure this shared memory in TF-A.
Just assure that CFG_CO

feat(stm32mp15): disable OP-TEE shared memory

OP-TEE manages its own memory, and can open some areas through TZC400.
There is no need to configure this shared memory in TF-A.
Just assure that CFG_CORE_RESERVED_SHM=n for OP-TEE compilation.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib54acd60d9ec243d6ef9cc6b74937b4183d9ffa5

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feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

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feat(st): support gcc as linker

One of the internal make rules for ST platforms uses the linker, but
with dedicated options for ld. Adapt the rule to check if the linker
is gcc and use updated optio

feat(st): support gcc as linker

One of the internal make rules for ST platforms uses the linker, but
with dedicated options for ld. Adapt the rule to check if the linker
is gcc and use updated options.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: If566dccfa329f9d34a80673a60c6fadd642a0231

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fix(st): setting default KEY_SIZE

Setting default KEY_SIZE to 256 for ECDSA since it is currently being
set to 2048 by make_helpers/defaults.mk, which is an invalid size for
ECDSA

Change-Id: I4c0ed

fix(st): setting default KEY_SIZE

Setting default KEY_SIZE to 256 for ECDSA since it is currently being
set to 2048 by make_helpers/defaults.mk, which is an invalid size for
ECDSA

Change-Id: I4c0edf714dcd2a31d5e50ea060b1b5348167387d
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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fix(st): enable RTC clock before accessing nv counter

The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled be

fix(st): enable RTC clock before accessing nv counter

The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled before accessing it.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2e9fc2c7ac516d6f8624cc6c9d442ee85629bf9a

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fix(st): update comment on encryption key

On STM32MP2, the encryption key is 32 bytes, the key duplication
(done for 16 bytes OTP) is not done. Update the comment to precise that.

Change-Id: I6fc4d

fix(st): update comment on encryption key

On STM32MP2, the encryption key is 32 bytes, the key duplication
(done for 16 bytes OTP) is not done. Update the comment to precise that.

Change-Id: I6fc4d652fdd462808918e85f6e5bd0d68d10d436
Yann Gautier <yann.gautier@foss.st.com>

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