| #
9e6ab88e |
| 16-Dec-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I7854e1ae,I214e4b2b,I000573e5 into integration
* changes: feat(stm32mp2): add a runtime service for STGEN configuration feat(stm32mp2): add common SMC runtime services feat(stm32
Merge changes I7854e1ae,I214e4b2b,I000573e5 into integration
* changes: feat(stm32mp2): add a runtime service for STGEN configuration feat(stm32mp2): add common SMC runtime services feat(stm32mp1): rework SVC services
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| #
39b08bc3 |
| 27-Oct-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): rework SVC services
Having two generations of STM32MPX using the same SMCCC protocol, rework the SVC services setup to put in common what can be put in common and implement platform-
feat(stm32mp1): rework SVC services
Having two generations of STM32MPX using the same SMCCC protocol, rework the SVC services setup to put in common what can be put in common and implement platform-specific handlers.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I000573e50d55dc70163c2657c12cc84085416f6b
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| #
705832b3 |
| 11-Aug-2023 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge changes I2f4961fe,I0039c724,Iaa3076c1,Ic19973a8 into integration
* changes: feat(bl32): print entry point before exiting SP_MIN fix(bl32): avoid clearing argument registers in RESET_TO_SP_
Merge changes I2f4961fe,I0039c724,Iaa3076c1,Ic19973a8 into integration
* changes: feat(bl32): print entry point before exiting SP_MIN fix(bl32): avoid clearing argument registers in RESET_TO_SP_MIN case fix(bl32): always include arm_arch_svc in SP_MIN fix(services): disable workaround discovery on aarch32 for now
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| #
cd0786c7 |
| 14-Mar-2023 |
Stephan Gerhold <stephan@gerhold.net> |
fix(bl32): always include arm_arch_svc in SP_MIN
The PSCI_FEATURES call implementation in TF-A always indicates support for SMCCC_VERSION, but only BL31 ensures that the corresponding Arm Architectu
fix(bl32): always include arm_arch_svc in SP_MIN
The PSCI_FEATURES call implementation in TF-A always indicates support for SMCCC_VERSION, but only BL31 ensures that the corresponding Arm Architecture Service (arm_arch_svc) is really included in the build. For SP_MIN only stm32mp1 currently includes it in the platform-specific make file.
This means that it is easily possible to build configurations that violate the PSCI/SMCCC specification. On Linux this leads to incorrect detection of the SMC Calling Convention when using SP_MIN:
[ 0.000000] psci: SMC Calling Convention v65535.65535
Fix this by always including the Arm Architecture Service in SP_MIN builds. This allows Linux to detect the convention correctly:
[ 0.000000] psci: SMC Calling Convention v1.4
Change-Id: Iaa3076c162b7a55633ec1e27eb5c44d22f8eb2a1 Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| #
c2c3ca12 |
| 16-Jan-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "refactor_st_common" into integration
* changes: refactor(st): move board info in common code refactor(st): move GIC code to common directory refactor(st): move boot b
Merge changes from topic "refactor_st_common" into integration
* changes: refactor(st): move board info in common code refactor(st): move GIC code to common directory refactor(st): move boot backup register management
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| #
c27d8c00 |
| 06-Aug-2019 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): move GIC code to common directory
The GIC v2 initialization code could be shared to other ST platforms. The stm32mp1_gic.c file is then moved to common directory, and renamed stm32mp_g
refactor(st): move GIC code to common directory
The GIC v2 initialization code could be shared to other ST platforms. The stm32mp1_gic.c file is then moved to common directory, and renamed stm32mp_gic.c. The functions are also prefixed with stm32mp_gic.
Change-Id: I60820823b470217d3a95cc569f941c2cb923dfa9 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
5fab71a7 |
| 14-Nov-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE" into integration
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| #
981b9dcb |
| 14-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
The code managing legacy boot (without FIP) that was under STM32MP_USE_STM32IMAGE flag is remove.
Change-Id: I04452453ed84567b0de39e900594a81526562
refactor(stm32mp1): remove STM32MP_USE_STM32IMAGE
The code managing legacy boot (without FIP) that was under STM32MP_USE_STM32IMAGE flag is remove.
Change-Id: I04452453ed84567b0de39e900594a81526562259 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
2ff6a49e |
| 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32mp13" into integration
* changes: feat(stm32mp1): select platform compilation either by flag or DT feat(stm32mp1-fdts): add support for STM32MP13 DK board feat(s
Merge changes from topic "stm32mp13" into integration
* changes: feat(stm32mp1): select platform compilation either by flag or DT feat(stm32mp1-fdts): add support for STM32MP13 DK board feat(stm32mp1-fdts): add DDR support for STM32MP13 feat(stm32mp1-fdts): add st-io_policies node for STM32MP13 feat(stm32mp1): updates for STM32MP13 device tree compilation feat(stm32mp1-fdts): add DT files for STM32MP13 feat(dt-bindings): add TZC400 bindings for STM32MP13 feat(stm32mp1): add "Boot mode" management for STM32MP13 feat(stm32mp1): manage HSLV on STM32MP13 feat(stm32mp1): add sdmmc compatible in platform define feat(st-sdmmc2): allow compatible to be defined in platform code feat(stm32mp1): update IO compensation on STM32MP13 feat(stm32mp1): call pmic_voltages_init() in platform init feat(st-pmic): add pmic_voltages_init() function feat(stm32mp1): update CFG0 OTP for STM32MP13 feat(stm32mp1): usb descriptor update for STM32MP13 feat(st-clock): add clock driver for STM32MP13 feat(dt-bindings): add bindings for STM32MP13 feat(stm32mp1): get CPU info from SYSCFG on STM32MP13 feat(stm32mp1): use only one filter for TZC400 on STM32MP13 feat(stm32mp1): add a second fixed regulator feat(stm32mp1): adaptations for STM32MP13 image header feat(stm32mp1): update boot API for header v2.0 feat(stm32mp1): update IP addresses for STM32MP13 feat(stm32mp1): add part numbers for STM32MP13 feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13 feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13 feat(stm32mp1): stm32mp_is_single_core() for STM32MP13 feat(stm32mp1): remove unsupported features on STM32MP13 feat(stm32mp1): update memory mapping for STM32MP13 feat(stm32mp1): introduce new flag for STM32MP13 feat(st): update stm32image tool for header v2
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| #
bdec516e |
| 18-Dec-2020 |
Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com> |
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no Cortex-M4. There is only one DDR port. SP_min is not supported, only OP-TEE can b
feat(stm32mp1): introduce new flag for STM32MP13
STM32MP13 is a variant of STM32MP1, with a single Cortex-A7, and no Cortex-M4. There is only one DDR port. SP_min is not supported, only OP-TEE can be used as monitor. STM32MP13 uses the header v2.0 format for stm32image generation for BL2.
Change-Id: Ie5b0e3230c5e064fe96f3561fc5b3208914dea53 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
22bbb34a |
| 15-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(stm32mp1): move PIE flag to SP_min" into integration
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| #
56e8952f |
| 09-Feb-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is included after the fla
refactor(stm32mp1): move PIE flag to SP_min
The PIE compilation is used only for BL32, move the ENABLE_PIE to sp_min-stm32mp1.mk file. Override PIE flags, as sp_min.mk file is included after the flags are set in Makefile. The BL2_IN_XIP_MEM was added for a feature not yet upstreamed. It is then removed from platform.mk file.
Change-Id: If055e51e0f160f99cd4e4cf68ca718d4d693119c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
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| #
164e1cda |
| 05-Nov-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(stm32mp1): use fconf.mk" into integration
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| #
325376eb |
| 29-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): use fconf.mk
Update STM32MP1 platform.mk file to include fconf.mk.
Change-Id: Idc623a832b4cdf9486835fc612803015f4f1a5f5 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
26dccba6 |
| 27-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "scmi-msg" into integration
* changes: doc: maintainers: add scmi server drivers: move scmi-msg out of st
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| #
b4734308 |
| 20-Jan-2021 |
Peng Fan <peng.fan@nxp.com> |
drivers: move scmi-msg out of st
Make the scmi-msg driver reused by others.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Change-Id: I5bc35fd4dab70f45c09b8aab65af4209cf23b124
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| #
1b662661 |
| 16-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: use newly introduced GICv2 makefile" into integration
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| #
33c91baf |
| 07-Aug-2020 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: use newly introduced GICv2 makefile
Include the GICv2 makefile in STM32MP1 SP_min makefile, and use ${GICV2_SOURCES} instead of taking drivers/arm/gic files directly.
Change-Id: Ibcaed5b0
stm32mp1: use newly introduced GICv2 makefile
Include the GICv2 makefile in STM32MP1 SP_min makefile, and use ${GICV2_SOURCES} instead of taking drivers/arm/gic files directly.
Change-Id: Ibcaed5b0bd17f6d8cf200e208c11cc10cd6d2ee5 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
43f7d887 |
| 22-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32-scmi" into integration
* changes: stm32mp1: SCMI clock and reset service in SP_MIN dts: bindings: stm32mp1: define SCMI clock and reset domain IDs
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| #
fdaaaeb4 |
| 16-Jul-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firm
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firmware.
Requests execution use a fastcall SMC context using a SiP function ID. The setup allows the create SCMI channels by assigning a specific SiP SMC function ID for each channel/agent identifier defined. In this change, stm32mp1 exposes a single channel and hence expects single agent at a time.
The input payload in copied in secure memory before the message in passed through the SCMI server drivers. BL32/sp_min is invoked for a single SCMI message processing and always returns with a synchronous response message passed back to the caller agent.
This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was previously wrongly set 4 whereas only 1 SiP SMC function ID was to be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the 2 added SiP SMC function IDs for SCMI services.
Change-Id: Icb428775856b9aec00538172aea4cf11e609b033 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| #
6c681439 |
| 02-Jul-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "stm32mp1: introduce shared resources support" into integration
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| #
3c20ad56 |
| 25-Jun-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "stm32mp1: SP_MIN embeds Arm Architecture services" into integration
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| #
450e15a7 |
| 23-Jun-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: SP_MIN embeds Arm Architecture services
Embed Arch Architecture SMCCC services in stm32mp1 SP_MIN. This service is needed by Linux kernel to setup the SMCCC conduit used by its SCMI SMC tr
stm32mp1: SP_MIN embeds Arm Architecture services
Embed Arch Architecture SMCCC services in stm32mp1 SP_MIN. This service is needed by Linux kernel to setup the SMCCC conduit used by its SCMI SMC transport driver.
Change-Id: I454a7ef3048a77ab73fff945e8115b60445d5841 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
47cf5d3f |
| 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: introduce shared resources support
STM32MP1 SoC includes peripheral interfaces that can be assigned to the secure world, or that can be opened to the non-secure world.
This change introdu
stm32mp1: introduce shared resources support
STM32MP1 SoC includes peripheral interfaces that can be assigned to the secure world, or that can be opened to the non-secure world.
This change introduces the basics of a driver that manages such resources which assignation is done at run time. It currently offers API functions that state whether a service exposed to non-secure world has permission to access a targeted clock or reset controller.
Change-Id: Iff20028f41586bc501085488c03546ffe31046d8 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| #
34a66d80 |
| 03-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32-etzpc" into integration
* changes: plat/stm32mp1: sp_min relies on etzpc driver dts: stm32mp157c: add etzpc node drivers: introduce ST ETZPC driver
|