| #
044b22a0 |
| 17-Dec-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "rockchip-secure-ddr" into integration
* changes:
rockchip: make miniloader ddr_parameter handling optional
rockchip: px30: cleanup securing of ddr regions
rockchip: p
Merge changes from topic "rockchip-secure-ddr" into integration
* changes:
rockchip: make miniloader ddr_parameter handling optional
rockchip: px30: cleanup securing of ddr regions
rockchip: px30: move secure init to separate file
rockchip: really use base+size for secure ddr regions
rockchip: bring TZRAM_SIZE values in line
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| #
7f0b2e78 |
| 09-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: really use base+size for secure ddr regions
The calls to secure ddr regions on rk3288 and rk3399 use parameters of
base and size - as it custom for specifying memory regions, but the
funct
rockchip: really use base+size for secure ddr regions
The calls to secure ddr regions on rk3288 and rk3399 use parameters of
base and size - as it custom for specifying memory regions, but the
functions themself expect start and endpoints of the area.
This only works by chance for the TZRAM, as it starts a 0x0 and therefore
its end location is the same as its size.
To not fall into a trap later on adapt the functions to really take
base+size parameters.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Change-Id: Idb9fab38aa081f3335a4eca971e7b7f6757fbbab
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| #
8742f857 |
| 26-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "rk3288" into integration
* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double
Merge changes from topic "rk3288" into integration
* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double declaration of entry_point storage
rockchip: Allow socs with undefined wfe check bits
rockchip: move pmusram assembler code to a aarch64 subdir
sp_min: allow inclusion of a platform-specific linker script
sp_min: make sp_min_warm_entrypoint public
drivers: ti: uart: add a aarch32 variant
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| #
780e3f24 |
| 14-Mar-2019 |
Heiko Stuebner <heiko@sntech.de> |
rockchip: add support for rk3288
The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
with later SoCs.
Working features are general non-secure mode (the gic needs special
love for tha
rockchip: add support for rk3288
The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
with later SoCs.
Working features are general non-secure mode (the gic needs special
love for that), psci-based smp bringing cpu cores online and also
taking them offline again, psci-based suspend (the simpler variant
also included in the linux kernel, deeper suspend following later)
and I was also already able to test HYP-mode and was able to boot
a virtual kernel using kvm.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a
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