History log of /rk3399_ARM-atf/plat/rockchip/common/include/plat_private.h (Results 1 – 25 of 61)
Revision Date Author Comments
# 35b2bbf4 28-Jul-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "bk/pabandon_cleanup" into integration

* changes:
feat(cpus): add pabandon support to the Alto cpu
feat(psci): optimise clock init on a pabandon
feat(psci): check that

Merge changes from topic "bk/pabandon_cleanup" into integration

* changes:
feat(cpus): add pabandon support to the Alto cpu
feat(psci): optimise clock init on a pabandon
feat(psci): check that CPUs handled a pabandon
feat(psci): make pabandon support generic
refactor(psci): unify coherency exit between AArch64 and AArch32
refactor(psci): absorb psci_power_down_wfi() into common code
refactor(platforms): remove usage of psci_power_down_wfi
fix(cm): disable SPE/TRBE correctly

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# 1ed77d1b 11-Mar-2025 Boyan Karatotev <boyan.karatotev@arm.com>

refactor(platforms): remove usage of psci_power_down_wfi

The callers in PSCI will now call wfi() after calling the
pwr_domain_pwr_down() platform hook (previously they were mutually
exclusive). As s

refactor(platforms): remove usage of psci_power_down_wfi

The callers in PSCI will now call wfi() after calling the
pwr_domain_pwr_down() platform hook (previously they were mutually
exclusive). As such, there is no need for platforms to do this
themselves. In fact, it is strongly advisable for platforms not to do
this themselves so that the PSCI can apply any relevant errata
mitigations.

Change-Id: Ic9702edef7503996be24d984e29dfcc13bc3fcba
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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# 04b2fb42 25-Feb-2025 Mark Dykes <mark.dykes@arm.com>

Merge "feat(rk3576): support rk3576" into integration


# 036935a8 07-Feb-2025 XiaoDong Huang <derrick.huang@rock-chips.com>

feat(rk3576): support rk3576

rk3576 is an Octa-core soc with Cortex-a53/a72 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4

feat(rk3576): support rk3576

rk3576 is an Octa-core soc with Cortex-a53/a72 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system

Change-Id: I67a019822bd4af13e4a3cdd09cf06202f4922cc4
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>

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# 44418fce 22-Aug-2024 Mark Dykes <mark.dykes@arm.com>

Merge changes from topics "rockchip", "rockchip-rk3588" into integration

* changes:
feat(rk3588): support SCMI for clock/reset domain
feat(rk3588): support rk3588


# 04150fee 25-Jun-2023 XiaoDong Huang <derrick.huang@rock-chips.com>

feat(rk3588): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I5

feat(rk3588): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: I5b983877a5b4e8acababbf7e0a3e2725e6479e08

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# a19ee8da 20-Jun-2024 André Przywara <andre.przywara@arm.com>

Merge changes from topic "rockchip" into integration

* changes:
fix(rockchip): add parenthesis for BITS_SHIFT macro
fix(rockchip): xlat: fix compatibility between v1 and v2


# 901e94ed 25-Jun-2023 XiaoDong Huang <derrick.huang@rock-chips.com>

fix(rockchip): add parenthesis for BITS_SHIFT macro

Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Change-Id: Ideac271469f0753c5b7aaed7bb07a792b64ae01e


# fe4df8bd 07-Jun-2024 André Przywara <andre.przywara@arm.com>

Merge "feat(rockchip): add RK3566/RK3568 Socs support" into integration


# 9fd9f1d0 30-Sep-2022 shengfei Xu <xsf@rock-chips.com>

feat(rockchip): add RK3566/RK3568 Socs support

RK3566/RK3568 is a Quad-core soc and Cortex-a55 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. su

feat(rockchip): add RK3566/RK3568 Socs support

RK3566/RK3568 is a Quad-core soc and Cortex-a55 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I8b98a4d07664de26bd6078f63664cbc3d9c1c68c

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# 99becbe3 15-Aug-2019 Paul Beesley <paul.beesley@arm.com>

Merge changes from topic "rockchip-uart-fixes" into integration

* changes:
rockchip: rk3399: store actual debug uart information on suspend
rockchip: move dt-coreboot uart distinction into param

Merge changes from topic "rockchip-uart-fixes" into integration

* changes:
rockchip: rk3399: store actual debug uart information on suspend
rockchip: move dt-coreboot uart distinction into param handling code
rockchip: make uart baudrate configurable
rockchip: px30: add uart5 as option for serial output

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# dd4a0d16 05-Aug-2019 Heiko Stuebner <heiko@sntech.de>

rockchip: move dt-coreboot uart distinction into param handling code

Rockchip platforms can be booted from either u-boot or coreboot.

So far the Coreboot-console was initizalized from a coreboot da

rockchip: move dt-coreboot uart distinction into param handling code

Rockchip platforms can be booted from either u-boot or coreboot.

So far the Coreboot-console was initizalized from a coreboot data struct
in the early_param2 callbacks and dt-based consoles with data from the
rockchip_get_uart_* functions.

But later code may also need this console information for example for
special suspend handling. To make this easy follow a suggestion from
Julius Werner and move the coreboot<->dt distinction into the
rockchip_get_uart_* functions, thus making correct data about the used
uart available to all Rockchip platform code at all times.

This includes a new rockchip_get_uart_clock as well, because while the
dt-platforms right now always just default the rate defined in a constant
Coreboot provides its own field for the clock rate and we don't want to
loose that information for the console init. Similarly the rk_uart_*
variables should move into the non-Coreboot code, to prevent them from
being marked as unused, which also requires the rk_get_uart_* functions
to move below the actual dt-parsing.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I278d595d2aa6c6864187fc8979a9fbff9814feac

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# 30970e0f 05-Aug-2019 Heiko Stuebner <heiko@sntech.de>

rockchip: make uart baudrate configurable

A previous patch already allowed to configure the uart output from the
devicetree, but on Rockchip platforms we also have the issue of different
vendors usi

rockchip: make uart baudrate configurable

A previous patch already allowed to configure the uart output from the
devicetree, but on Rockchip platforms we also have the issue of different
vendors using different baudrates for their uarts.

For example, rk3399 has a default baudrate of 115200 which is true for
ChromeOS-devices and boards from Theobroma-Systems, while all the boards
using the vendor boot chain actually use a baudrate of 1500000.

Similarly the newly added px30 has a default of said 1500000 but some
boards may want to use the more widely used 115200.

The devicetree stdout-path node already contains the desired baudrate,
so add simple code to parse it from there and override the default,
which stays unchanged.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I7412139c3df3073a1996eb508ec08642ec6af90d

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# a3b16996 02-Aug-2019 Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "Switch AARCH32/AARCH64 to __aarch64__" into integration


# 01c44ddd 02-Aug-2019 Alexei Fedorov <Alexei.Fedorov@arm.com>

Merge "Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__" into integration


# 402b3cf8 09-Jul-2019 Julius Werner <jwerner@chromium.org>

Switch AARCH32/AARCH64 to __aarch64__

NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.

All common C compilers pre-define the same macros to signal which
architecture the cod

Switch AARCH32/AARCH64 to __aarch64__

NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.

All common C compilers pre-define the same macros to signal which
architecture the code is being compiled for: __arm__ for AArch32 (or
earlier versions) and __aarch64__ for AArch64. There's no need for TF-A
to define its own custom macros for this. In order to unify code with
the export headers (which use __aarch64__ to avoid another dependency),
let's deprecate the AARCH32 and AARCH64 macros and switch the code base
over to the pre-defined standard macro. (Since it is somewhat
unintuitive that __arm__ only means AArch32, let's standardize on only
using __aarch64__.)

Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200
Signed-off-by: Julius Werner <jwerner@chromium.org>

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# d5dfdeb6 09-Jul-2019 Julius Werner <jwerner@chromium.org>

Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__

NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.

All common C compilers predefine a macro called __ASSEMBLER__ when
pre

Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__

NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.

All common C compilers predefine a macro called __ASSEMBLER__ when
preprocessing a .S file. There is no reason for TF-A to define it's own
__ASSEMBLY__ macro for this purpose instead. To unify code with the
export headers (which use __ASSEMBLER__ to avoid one extra dependency),
let's deprecate __ASSEMBLY__ and switch the code base over to the
predefined standard.

Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417
Signed-off-by: Julius Werner <jwerner@chromium.org>

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# d38613df 25-Jul-2019 Soby Mathew <soby.mathew@arm.com>

Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration

* changes:
plat/mediatek/mt81*: Use new bl31_params_parse() helper
plat/rockchip: Use new bl31_params_parse_

Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration

* changes:
plat/mediatek/mt81*: Use new bl31_params_parse() helper
plat/rockchip: Use new bl31_params_parse_helper()
Add helper to parse BL31 parameters (both versions)
Factor out cross-BL API into export headers suitable for 3rd party code
Use explicit-width data types in AAPCS parameter structs
plat/rockchip: Switch to use new common BL aux parameter library
Introduce lightweight BL platform parameter library

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# 3e02c743 30-May-2019 Julius Werner <jwerner@chromium.org>

plat/rockchip: Use new bl31_params_parse_helper()

The Rockchip platform is a prime candidate for switching to the new
bl31_params_parse_helper(), so switch it over. This will allow BL2
implementatio

plat/rockchip: Use new bl31_params_parse_helper()

The Rockchip platform is a prime candidate for switching to the new
bl31_params_parse_helper(), so switch it over. This will allow BL2
implementations on this platform to transparently switch over to the
version 2 parameter structure.

Change-Id: I540741d2425c93f66c8697ce749a351eb2b3a7e8
Signed-off-by: Julius Werner <jwerner@chromium.org>

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# c1185ffd 25-May-2019 Julius Werner <jwerner@chromium.org>

plat/rockchip: Switch to use new common BL aux parameter library

This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly sp

plat/rockchip: Switch to use new common BL aux parameter library

This patch changes all Rockchip platforms to use the new common BL aux
parameter helpers. Since the parameter space is now cleanly split in
generic and vendor-specific parameters and the COREBOOT_TABLE
parameter is now generic, the parameter type number for that parameter
has to change. Since it only affects coreboot which always builds TF as
a submodule and includes its headers directly to get these constants,
this should not cause any issues. In general, after this point, we
should avoid changing already assigned parameter type numbers whenever
possible.

Change-Id: Ic99ddd1e91ff5e5fe212fa30c793a0b8394c9dad
Signed-off-by: Julius Werner <jwerner@chromium.org>

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# b3c8ac13 02-May-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge changes from topic "rk3399q7" into integration

* changes:
rockchip: Allow console device to be set by DTB.
rockchip: Add params_setup to RK3328.
rockchip: Streamline and complete UARTn_B

Merge changes from topic "rk3399q7" into integration

* changes:
rockchip: Allow console device to be set by DTB.
rockchip: Add params_setup to RK3328.
rockchip: Streamline and complete UARTn_BASE macros.

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# 220c33a2 19-Apr-2019 Christoph Müllner <christophm30@gmail.com>

rockchip: Allow console device to be set by DTB.

Currently the compile-time constant PLAT_RK_UART_BASE defines
which UART is used as console device. E.g. on RK3399 it is set
to UART2. That means, th

rockchip: Allow console device to be set by DTB.

Currently the compile-time constant PLAT_RK_UART_BASE defines
which UART is used as console device. E.g. on RK3399 it is set
to UART2. That means, that a single bl31 image can not be used
for two boards, which just differ on the UART console.

This patch addresses this limitation by parsing the "stdout-path"
property from the "chosen" node in the DTB. The expected property
string is expected to have the form "serialN:XXX", with
N being either 0, 1, 2, 3 or 4. When the property is found, it will
be used to override PLAT_RK_UART_BASE.

Tested on RK3399-Q7, with a stdout-path of "serial0:115200n8".

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: Iafe1320e77ab006c121f8d52745d54cef68a48c7

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# 8742f857 26-Apr-2019 Soby Mathew <soby.mathew@arm.com>

Merge changes from topic "rk3288" into integration

* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double

Merge changes from topic "rk3288" into integration

* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double declaration of entry_point storage
rockchip: Allow socs with undefined wfe check bits
rockchip: move pmusram assembler code to a aarch64 subdir
sp_min: allow inclusion of a platform-specific linker script
sp_min: make sp_min_warm_entrypoint public
drivers: ti: uart: add a aarch32 variant

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# 82e18f89 14-Mar-2019 Heiko Stuebner <heiko@sntech.de>

rockchip: add common aarch32 support

There are a number or ARMv7 Rockchip SoCs that are very similar in their
bringup routines to the existing arm64 SoCs, so there is quite a high
commonality possib

rockchip: add common aarch32 support

There are a number or ARMv7 Rockchip SoCs that are very similar in their
bringup routines to the existing arm64 SoCs, so there is quite a high
commonality possible here.

Things like virtualization also need psci and hyp-mode and instead of
trying to cram this into bootloaders like u-boot, barebox or coreboot
(all used in the field), re-use the existing infrastructure in TF-A
for this (both Rockchip plat support and armv7 support in general).

So add core support for aarch32 Rockchip SoCs, with actual soc support
following in a separate patch.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b

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# 9a207532 04-Jan-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase


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