fix(rza): give more time to J-Link debugger

From J-Link v9.22, the reset sequence for RZ/A3M has been fixed to avoid
corrupting the x0 and x1 registers. However, it now takes slightly
longer to halt

fix(rza): give more time to J-Link debugger

From J-Link v9.22, the reset sequence for RZ/A3M has been fixed to avoid
corrupting the x0 and x1 registers. However, it now takes slightly
longer to halt the core, so the delay must be increased. Otherwise,
flashing may fail on subsequent attempts.

Change-Id: Ifd2a85393c1eb43408680196c792f432cf02124e
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>

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fix(rza): staticize handle_debug_mode()

The handle_debug_mode() is called from one place only, the
bl2_early_platform_setup2() which is located in the same file.
Mark handle_debug_mode() static.

Si

fix(rza): staticize handle_debug_mode()

The handle_debug_mode() is called from one place only, the
bl2_early_platform_setup2() which is located in the same file.
Mark handle_debug_mode() static.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I47e50d363e022c4252ae3ef892ba7bbd820b6595

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feat(rza): add initial BL2 support for RZ/A platforms

This patch introduces the initial BL2 support for Renesas RZ/A
platforms. It adds platform-specific sources, drivers, build files,
and memory co

feat(rza): add initial BL2 support for RZ/A platforms

This patch introduces the initial BL2 support for Renesas RZ/A
platforms. It adds platform-specific sources, drivers, build files,
and memory configuration needed to boot via BL2.

Key changes include:
- Board-specific makefiles for RZ/A3M board.
- Platform helpers and BL2 setup routines.
- Drivers for DDR, GPIO, and CPG drivers.
- Platform headers, register definitions, and configuration files.
- Scripts and makefiles for image generation.

Change-Id: I6cea17a76633998d746e7c7c429da9a5bd09ef0c
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>

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