| #
d6b458e8 |
| 24-Oct-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes Ia66dd232,Ie0ddbe0b,Idd191614 into integration
* changes:
fix(rcar3-drivers): update DDR setting
fix(rcar3): fix CPG register code comment
fix(rcar3): update Draak and Eagle boar
Merge changes Ia66dd232,Ie0ddbe0b,Idd191614 into integration
* changes:
fix(rcar3-drivers): update DDR setting
fix(rcar3): fix CPG register code comment
fix(rcar3): update Draak and Eagle board IDs
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| #
69c371bc |
| 12-Jul-2021 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
fix(rcar3): fix CPG register code comment
Update the code comment to match referenced register.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hoso
fix(rcar3): fix CPG register code comment
Update the code comment to match referenced register.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ie0ddbe0bffd31794425f0967c865e2928ce8d78d
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| #
c87f2c1d |
| 13-Aug-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration
* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM siz
Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration
* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM size setting for M3N
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0
feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB
feat(drivers/rcar3): ddr: add function to judge a DDR rank
fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N
fix(drivers/rcar3): i2c_dvfs: fix I2C operation
fix(drivers/rcar3): fix CPG registers redefinition
fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition
fix(plat/rcar3): generate two memory nodes for larger than 2 GiB channel 0
refactor(plat/rcar3): factor out DT memory node generation
feat(plat/rcar3): add optional support for gzip-compressed BL33
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| #
0dae56bb |
| 30-Nov-2020 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
fix(drivers/rcar3): fix CPG registers redefinition
This commit deletes the value of the redefined CPG register.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by
fix(drivers/rcar3): fix CPG registers redefinition
This commit deletes the value of the redefined CPG register.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I05cf4a449ae28adb2ddd59593971a7d0cbcb21de
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| #
fc037ffc |
| 14-Jan-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes Id2b1822c,Ia9a563a1,I11f65d49,If9318a51,I46801b56, ... into integration
* changes:
drivers: renesas: Move plat common sources
plat: renesas: Move headers and assembly files to comm
Merge changes Id2b1822c,Ia9a563a1,I11f65d49,If9318a51,I46801b56, ... into integration
* changes:
drivers: renesas: Move plat common sources
plat: renesas: Move headers and assembly files to common folder
plat: renesas: rcar: include: Code cleanup
plat: renesas:rcar: Fix checkpatch warnings
plat: renesas: rcar: Fix checkpatch warnings
plat: renesas:rcar: Code cleanup
plat: renesas: rcar: Fix coding style
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| #
011a4c2f |
| 16-Dec-2020 |
Biju Das <biju.das.jz@bp.renesas.com> |
plat: renesas: Move headers and assembly files to common folder
Create a common directory and move the header and assembly files
so that the common code can be used by both Renesas R-Car Gen3 and
RZ
plat: renesas: Move headers and assembly files to common folder
Create a common directory and move the header and assembly files
so that the common code can be used by both Renesas R-Car Gen3 and
RZ/G2 platforms.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Change-Id: Ia9a563a1c3c9f8c6f0d3cb82622deb2e155d7f6c
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