| #
d1b5ada8 |
| 19-Jul-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "msm8916-plats" into integration
* changes:
docs(msm8916): document new platforms
feat(msm8916): add port for MDM9607
refactor(msm8916): handle single core platforms
Merge changes from topic "msm8916-plats" into integration
* changes:
docs(msm8916): document new platforms
feat(msm8916): add port for MDM9607
refactor(msm8916): handle single core platforms
feat(msm8916): add port for MSM8939
feat(msm8916): power on L2 caches for secondary clusters
feat(msm8916): initialize CCI-400 for multiple clusters
refactor(msm8916): handle multiple CPU clusters
feat(msm8916): add port for MSM8909
feat(msm8916): clear CACHE_LOCK for MMU-500 r2p0+
style(msm8916): add missing braces to while statements
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|
| #
1240dc7e |
| 16-Sep-2022 |
Stephan Gerhold <stephan@gerhold.net> |
feat(msm8916): initialize CCI-400 for multiple clusters
The MSM8939 SoC is very similar to MSM8916 but uses an ARM CCI-400
for cache coherence between the two CPU clusters. Add the necessary
code to
feat(msm8916): initialize CCI-400 for multiple clusters
The MSM8939 SoC is very similar to MSM8916 but uses an ARM CCI-400
for cache coherence between the two CPU clusters. Add the necessary
code to initialize it with the existing driver.
No functional change for platforms with a single cluster. The CCI
related code is discarded entirely in this case.
Change-Id: I041d60222d8d2aeca53b392934c87280c66b0db0
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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| #
c4c7efe7 |
| 22-Jun-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "msm8916-spmin" into integration
* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port f
Merge changes from topic "msm8916-spmin" into integration
* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port for AArch32
refactor(msm8916): detect cold boot in plat_get_my_entrypoint
feat(msm8916): add Test Secure Payload (TSP) port
build(msm8916): place bl32 directly after bl31
refactor(msm8916): separate common platform setup code
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| #
45b2bd0a |
| 28-Aug-2022 |
Stephan Gerhold <stephan@gerhold.net> |
feat(msm8916): add SP_MIN port for AArch32
Use the new shared msm8916 setup code to allow compiling the minimal
AArch32 Secure Payload (SP_MIN) as simple PSCI implementation.
AArch64 is preferred f
feat(msm8916): add SP_MIN port for AArch32
Use the new shared msm8916 setup code to allow compiling the minimal
AArch32 Secure Payload (SP_MIN) as simple PSCI implementation.
AArch64 is preferred for the Cortex-A53 cores in MSM8916 but there are
some similar platforms with AArch32-only Cortex-A7 cores that can
benefit from this in future changes.
The AArch32 assembly implementation for msm8916_helpers.S and
uartdm_console.S is a direct port of the AArch64 implementation.
Only plat_get_my_entrypoint is slightly different because there is no
need to handle the "boot remapper" on cold boot for AArch32.
Change-Id: Idf160e86fb3e685fcedec3e051400e6273997b74
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
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|