Merge changes from topic "msm8916-spmin" into integration

* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port f

Merge changes from topic "msm8916-spmin" into integration

* changes:
docs(msm8916): document new build options
feat(msm8916): allow selecting which UART to use
feat(msm8916): add SP_MIN port for AArch32
refactor(msm8916): detect cold boot in plat_get_my_entrypoint
feat(msm8916): add Test Secure Payload (TSP) port
build(msm8916): place bl32 directly after bl31
refactor(msm8916): separate common platform setup code

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feat(msm8916): add Test Secure Payload (TSP) port

Use the new shared msm8916 setup code to easily allow compiling the
Test Secure Payload (TSP) for the msm8916 platform.

Unlike BL31, TSP only calls

feat(msm8916): add Test Secure Payload (TSP) port

Use the new shared msm8916 setup code to easily allow compiling the
Test Secure Payload (TSP) for the msm8916 platform.

Unlike BL31, TSP only calls msm8916_platform_setup() but not
msm8916_configure() because this is already done in BL31.

Change-Id: I3225ef9e61387d49870e9759ffd5b899a8805961
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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refactor(msm8916): separate common platform setup code

In preparation of adding BL32 support for the msm8916 platform
(AArch32/SP_MIN and TSP), separate the common platform setup code into
shared ms

refactor(msm8916): separate common platform setup code

In preparation of adding BL32 support for the msm8916 platform
(AArch32/SP_MIN and TSP), separate the common platform setup code into
shared msm8916_setup.c and msm8916_config.c files which can be called
from both BL31 and BL32.

msm8916_setup.c contains the relevant shared code for BL31/SP_MIN/TSP,
while msm8916_config.c is cold boot configuration code that is only
relevant for BL31 and SP_MIN (but not TSP).

No functional change.

Change-Id: I055522d5ad8c03dfb8e09236dc47dd383a480e95
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding G

Merge changes from topic "msm8916" into integration

* changes:
feat(msm8916): allow booting secondary CPU cores
feat(msm8916): setup hardware for non-secure world
feat(gic): allow overriding GICD_PIDR2_GICV2 address
feat(msm8916): initial platform port
docs(msm8916): new port for Qualcomm Snapdragon 410

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feat(msm8916): setup hardware for non-secure world

Booting e.g. Linux in the non-secure world does not work with the
msm8916 port yet because essential hardware is not made available to
the non-secu

feat(msm8916): setup hardware for non-secure world

Booting e.g. Linux in the non-secure world does not work with the
msm8916 port yet because essential hardware is not made available to
the non-secure world. Add more platform initialization to:

- Initialize the GICv2 and mark secure interrupts.
Only secure SGIs/PPIs so far. Override the GICD_PIDR2_GICV2
register address in platform_def.h to avoid a failing assert()
because of a (hardware) mistake in Qualcomm's GICv2 implementation.

- Make a timer frame available to the non-secure world.
The "Qualcomm Timer" (QTMR) implements the ARM generic timer
specification, so the standard defines (CNTACR_BASE etc)
can be used.

- Make parts of the "APCS" register region available to the
non-secure world, e.g. for CPU frequency control implemented
in Linux.

- Initialize a platform-specific register to route all SMMU context
bank interrupts to the non-secure interrupt pin, since all control
of the SMMUs is left up to the non-secure world for now.

Change-Id: Icf676437b8e329dead06658e177107dfd0ba4f9d
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>

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