| #
d0ce1ac5 |
| 20-Jun-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "s32g274a/sd_support" into integration
* changes:
feat(s32g274a): move fip in a dedicated partition
feat(s32g274ardb): initialize the IO buffer
feat(s32g274ardb): init
Merge changes from topic "s32g274a/sd_support" into integration
* changes:
feat(s32g274a): move fip in a dedicated partition
feat(s32g274ardb): initialize the IO buffer
feat(s32g274ardb): initialize the uSDHC driver
feat(s32g274ardb): set the system counter rate
feat(s32g274ardb): init the generic timer for BL2
fix(nxp-mmc): handle response for CMD0
refactor(mmc): replace 0 with MMC_RESPONSE_NONE
feat(mmc): add define for no response
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|
| #
e7905128 |
| 28-Mar-2025 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(s32g274ardb): init the generic timer for BL2
The generic timer must be initialized during BL2 because the uSDHC
driver, which will be enabled in subsequent commits, requires it for
delays.
Cha
feat(s32g274ardb): init the generic timer for BL2
The generic timer must be initialized during BL2 because the uSDHC
driver, which will be enabled in subsequent commits, requires it for
delays.
Change-Id: Ia09b3d3565a09ace7389d2e063af1185cc80fa27
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
show more ...
|
| #
4bd1e7bd |
| 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "add_s32g274ardb2_support" into integration
* changes:
feat(s32g274a): enable BL31 stage
feat(s32g274a): add S32G274ARDB2 board support
feat(nxp-drivers): add Linflex
Merge changes from topic "add_s32g274ardb2_support" into integration
* changes:
feat(s32g274a): enable BL31 stage
feat(s32g274a): add S32G274ARDB2 board support
feat(nxp-drivers): add Linflex driver
show more ...
|
| #
e73c3c3a |
| 26-Jan-2024 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(s32g274a): enable BL31 stage
Add BL31 prerequisites for the S32G274ARDB2 board to allow single-core
cold boot without MMU and PSCI services.
Change-Id: I8a10fd62f3cc9430083758043ea82e3803f6106
feat(s32g274a): enable BL31 stage
Add BL31 prerequisites for the S32G274ARDB2 board to allow single-core
cold boot without MMU and PSCI services.
Change-Id: I8a10fd62f3cc9430083758043ea82e3803f61060
Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@nxp.com>
Signed-off-by: Bogdan Roman <bogdan-gabriel.roman@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
show more ...
|