| #
624ffe51 |
| 14-Jan-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "nxp-s32g274a/enable-mmu" into integration
* changes:
feat(s32g274a): split early clock initialization
feat(s32g274a): enable MMU for BL31 stage
feat(s32g274a): dynami
Merge changes from topic "nxp-s32g274a/enable-mmu" into integration
* changes:
feat(s32g274a): split early clock initialization
feat(s32g274a): enable MMU for BL31 stage
feat(s32g274a): dynamically map GIC regions
feat(s32g274a): enable MMU for BL2 stage
feat(s32g274a): dynamically map siul2 and fip img
feat(s32g274a): map each image before its loading
feat(nxp-clk): dynamic map of the clock modules
feat(s32g274a): increase the number of MMU regions
feat(s32g274a): add console mapping
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| #
eb4d4185 |
| 26-Nov-2024 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(s32g274a): enable MMU for BL2 stage
Enable the MMU and add two entries to map the BL2 code and data regions.
Additional mappings will be added dynamically, enhancing flexibility and
modularity
feat(s32g274a): enable MMU for BL2 stage
Enable the MMU and add two entries to map the BL2 code and data regions.
Additional mappings will be added dynamically, enhancing flexibility and
modularity during the porting process.
Change-Id: I107abf944dfdce9dcff47b08272a5001484de8a9
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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