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72e8f245 |
| 08-Aug-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "chore: update to use Arm word across TF-A" into integration
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| #
4c700c15 |
| 01-Aug-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
chore: update to use Arm word across TF-A
Align entire TF-A to use Arm in copyright header.
Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244
Signed-off-by: Govindraj Raja <govindraj.raja@arm.co
chore: update to use Arm word across TF-A
Align entire TF-A to use Arm in copyright header.
Change-Id: Ief9992169efdab61d0da6bd8c5180de7a4bc2244
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| #
d5ce8df7 |
| 13-Jan-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "tegra-misra-21.1-fixes" into integration
* changes:
Tegra194: drivers: fix violations of MISRA Rule 21.1
Tegra: include: fix violations of MISRA Rule 21.1
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| #
67db3231 |
| 09-Jan-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: include: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
Tegra common header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
Tegra: include: fix violations of MISRA Rule 21.1
This patch fixes the violations of Rule 21.1 from all the
Tegra common header files.
Rule 21.1 "#define and #undef shall not be used on a reserved
identifier or reserved macro name"
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I2e117645c110e04c13fa86ebbbb38df4951d2185
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| #
c40c88f8 |
| 21-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1764 from vwadekar/tf2.0-tegra-downstream-rebase-1.7.19
Tf2.0 tegra downstream rebase 1.7.19
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087cf68a |
| 21-Jul-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: lib: library for profiling the cold boot path
The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) i
Tegra: lib: library for profiling the cold boot path
The non secure world would like to profile the boot path for
the EL3 and S-EL1 firmwares. To allow it to do that, a non-secure
DRAM region (4K) is allocated and the base address is passed to
the EL3 firmware.
This patch adds a library to allow the platform code to store the
tag:timestamp pair to the shared memory. The tegra platform code
then uses the `record` method to add timestamps.
Original change by Akshay Sharan <asharan@nvidia.com>
Change-Id: Idbbef9c83ed84a508b04d85a6637775960dc94ba
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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