feat(mt8196): enable MTE2

Enable the Memory Tagging Extension (MTE) feature for the MediaTek
mt8196 platform by setting ENABLE_FEAT_MTE2 to 1 in the platform
configuration. This enables MTE support

feat(mt8196): enable MTE2

Enable the Memory Tagging Extension (MTE) feature for the MediaTek
mt8196 platform by setting ENABLE_FEAT_MTE2 to 1 in the platform
configuration. This enables MTE support at EL1 and EL2.

Change-Id: Iafe4e89ad33d0834ea630009620a605ac36e0be3
Signed-off-by: Yidi Lin <yidilin@google.com>

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fix: use LDLIBS instead of LDFLAGS for library search paths

The LDLIBS is quite convenient for both the -l and -L flags as both ld
and gcc will accept them identically when linking. So use LDLIBS an

fix: use LDLIBS instead of LDFLAGS for library search paths

The LDLIBS is quite convenient for both the -l and -L flags as both ld
and gcc will accept them identically when linking. So use LDLIBS and
leave LDFLAGS alone for flags that have some difference (eg needing a
-Wl prefix).

Change-Id: I3f2ab54931eff4e796dc4757950ed797ab3344a8
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(mt8189): add pmic driver

1. add pmic shutdown/reset function
2. add pmic low power setting api

Signed-off-by: Zhigang Qin <zhigang.qin@mediatek.corp-partner.google.com>
Change-Id: Ie23e8ae50a6

feat(mt8189): add pmic driver

1. add pmic shutdown/reset function
2. add pmic low power setting api

Signed-off-by: Zhigang Qin <zhigang.qin@mediatek.corp-partner.google.com>
Change-Id: Ie23e8ae50a67be07f9025d69335c26b9569b3d70

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feat(mt8196): add SMMU SID stub implementation

Add stub implementation for SMMU SID driver.

Change-Id: Ia29fd72fb40e7ce372a27a748e0caac3300f045f
Signed-off-by: Yidi Lin <yidilin@chromium.org>

feat(mt8196): add SLBC SiP handler

Add SLBC SiP handler to service MTK_SLBC_KERNEL_OP_CPU_DCC request.

Change-Id: I31b359ceb1faf0401ee34343a8f338d5804d9d68
Signed-off-by: Yidi Lin <yidilin@chromium

feat(mt8196): add SLBC SiP handler

Add SLBC SiP handler to service MTK_SLBC_KERNEL_OP_CPU_DCC request.

Change-Id: I31b359ceb1faf0401ee34343a8f338d5804d9d68
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): add CPU QoS stub implementation

Add stub implementation for CPU QoS driver.

Change-Id: I1296aaff34c860ac878ad2ac26b511fb2411510e
Signed-off-by: Yidi Lin <yidilin@chromium.org>

refactor(mediatek): update EMI stub implementation

Refactor EMI stub implementation with following changes.
- Move the SiP call handlers to TF-A upstream.
- Move EMI definition used by APUSYS to pla

refactor(mediatek): update EMI stub implementation

Refactor EMI stub implementation with following changes.
- Move the SiP call handlers to TF-A upstream.
- Move EMI definition used by APUSYS to platform_def.h.
- Remove CONFIG_MTK_APUSYS_EMI_SUPPORT.

Change-Id: I30e1ee7f2ea2d6dc3415adba91cbe310af9b5eeb
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): add MMinfra support

Add MMinfra support for MT8196.

Change-Id: I5504764d05fecace4f0d3981785ff1bc8ae13d00
Signed-off-by: Yidi Lin <yidilin@chromium.org>

feat(mediatek): add UFS stub implementation

Implement stub functions for UFS to ensure that the build can pass when
a prebuilt library is not available.

Change-Id: If4470cd9a5b88e869363e763aec5830c

feat(mediatek): add UFS stub implementation

Implement stub functions for UFS to ensure that the build can pass when
a prebuilt library is not available.

Change-Id: If4470cd9a5b88e869363e763aec5830c1f8411f5
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <g

feat(mt8196): enable IRQ configuration

Enable IRQ configuration to add additional wake-up source to wake up the
SPM.

Change-Id: Id85c74c91801de0617fda104f2beb02f8bf8ef6c
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

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refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa

refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa0e891f080e58f21e6e79551d2a19e0
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b

feat(mt8196): fix MT8196 gpio driver

- Add GPIO_BASE in mtgpio.c
- Modify gpio register address

Signed-off-by: Cathy Xu <ot_cathy.xu@mediatek.com>
Change-Id: I648473fa373d208fa29c7069637974e097b75b26

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Merge "fix(mt8196): fix wrong register offset of dptx on MT8196" into integration

feat(mt8196): enable vcore dvfsrc feature

This patch will enable vcore dvfsrc.
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM

feat(mt8196): enable vcore dvfsrc feature

This patch will enable vcore dvfsrc.
- VCORE DVFS is the feature to change VCORE/DDR Freq for power saving
- When there are no requests for using Vcore/DRAM, Vcore DVFS will
- lower the voltage and frequency of Vcore/DRAM to achieve power saving.

Signed-off-by: Kunlong Wang <kunlong.wang@mediatek.corp-partner.google.com>
Change-Id: I972eb2da1b8526f4ce2927cd662a6fc3ef2f2401

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fix(mt8196): fix wrong register offset of dptx on MT8196

Fix wrong register offset of dptx on MT8196.

Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediat

fix(mt8196): fix wrong register offset of dptx on MT8196

Fix wrong register offset of dptx on MT8196.

Change-Id: I46f7ac7751d14c9093b7b5bd1c741179a7fbbd34
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-I

fix(mt8196): remove CPU_IDLE_SRAM_BASE entry from plat_mmap

This region is defined in LPM driver. Prefer managing this region in
LPM driver and remove it from plat_mmap and platform_def.h.

Change-Id: I57bfaad88a28d4f29e2b132ba080bc7d5b8248d8
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "fix(mt8196): add whole-archive option to prebuilt library" into integration

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chro

feat(mt8196): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I65b9e341b74f568f968f3c464a64ea754284cb8c
Signed-off-by: Yidi Lin <yidilin@chromium.org>

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fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during th

fix(mt8196): add whole-archive option to prebuilt library

Added `-Wl,--whole-archive` option to the LDLIBS in the platfrom.mk to
ensure that the symbols within the library are not stripped during the
linking process.

Change-Id: I35c728d3ccc98489183285a96f703e02dc7505d3
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge "feat(mt8196): add SMMU driver for PM" into integration

feat(mt8196): add SMMU driver for PM

Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM

feat(mt8196): add SMMU driver for PM

Add MediaTek SMMU power driver. This driver tracks the reference
counter for power domain access on SMMU hardware, including
Multimedia SMMU and APU SMMU. The PM get/put commands may come from
linux(EL1) and hypervisor(EL2).

Change-Id: I60f83c4e3d87059b0549b2ed8c68367be3bfbbc5
Signed-off-by: Yong Wu <yong.wu@mediatek.com>

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Merge "feat(mt8196): enable appropriate errata" into integration

feat(mt8196): enable appropriate errata

Booting mt8196 and grepping the logs for "errat" showed:

WARNING: BL31: cortex_a720: CPU workaround for erratum 2792132 was missing!
WARNING: BL31: corte

feat(mt8196): enable appropriate errata

Booting mt8196 and grepping the logs for "errat" showed:

WARNING: BL31: cortex_a720: CPU workaround for erratum 2792132 was missing!
WARNING: BL31: cortex_a720: CPU workaround for erratum 2844092 was missing!
WARNING: BL31: cortex_a720: CPU workaround for erratum 2926083 was missing!
WARNING: BL31: cortex_a720: CPU workaround for erratum 2940794 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2726228 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2740089 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2763018 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2816013 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2897503 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 2923985 was missing!
WARNING: BL31: cortex_x4: CPU workaround for erratum 3076789 was missing!

Set defines so that all the errata are fixed. Now the above shows:

INFO: BL31: cortex_a720: CPU workaround for erratum 2792132 was applied
INFO: BL31: cortex_a720: CPU workaround for erratum 2844092 was applied
INFO: BL31: cortex_a720: CPU workaround for erratum 2926083 was applied
INFO: BL31: cortex_a720: CPU workaround for erratum 2940794 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2726228 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2740089 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2763018 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2816013 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2897503 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 2923985 was applied
INFO: BL31: cortex_x4: CPU workaround for erratum 3076789 was applied

Change-Id: I209784c2574b99c3c275ac60adf73896e0cdd078
Signed-off-by: Douglas Anderson <dianders@chromium.org>

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feat(mt8196): turn on APU smpu protection

1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.

Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.l

feat(mt8196): turn on APU smpu protection

1. Turn on APU SMPU protection on MT8196.
2. Remove unused header file.

Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b
Signed-off-by: Karl Li <karl.li@mediatek.com>

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feat(mt8196): add Mediatek MMinfra stub implementation

Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not av

feat(mt8196): add Mediatek MMinfra stub implementation

Implement stub functions for the MMinfra (Multimedia Infrastructure)
driver to ensure that the build can pass when a prebuilt library is
not available.

Change-Id: Iadac654950c868d3743b13a1d6f7ab5d1015fb86
Signed-off-by: Yong Wu <yong.wu@mediatek.com>

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