| #
02309a84 |
| 27-May-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes Ia29fd72f,I31b359ce,I1296aaff,I30e1ee7f,Ib4a3593e, ... into integration
* changes: feat(mt8196): add SMMU SID stub implementation feat(mt8196): add SLBC SiP handler feat(mt8196):
Merge changes Ia29fd72f,I31b359ce,I1296aaff,I30e1ee7f,Ib4a3593e, ... into integration
* changes: feat(mt8196): add SMMU SID stub implementation feat(mt8196): add SLBC SiP handler feat(mt8196): add CPU QoS stub implementation refactor(mediatek): update EMI stub implementation feat(mediatek): add APIs exposed to the static library feat(mt8196): add MMinfra support feat(mt8196): add UFS functions used by the static library
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| #
00105882 |
| 28-Apr-2025 |
Yidi Lin <yidilin@chromium.org> |
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes. - Move the SiP call handlers to TF-A upstream. - Move EMI definition used by APUSYS to pla
refactor(mediatek): update EMI stub implementation
Refactor EMI stub implementation with following changes. - Move the SiP call handlers to TF-A upstream. - Move EMI definition used by APUSYS to platform_def.h. - Remove CONFIG_MTK_APUSYS_EMI_SUPPORT.
Change-Id: I30e1ee7f2ea2d6dc3415adba91cbe310af9b5eeb Signed-off-by: Yidi Lin <yidilin@chromium.org>
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| #
6ef685a9 |
| 31-Jan-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I58637b8d,I4bb1a50a,Iadac6549,I758e933f into integration
* changes: feat(mt8196): turn on APU smpu protection feat(mt8196): enable APU spmi operation feat(mt8196): add Mediatek M
Merge changes I58637b8d,I4bb1a50a,Iadac6549,I758e933f into integration
* changes: feat(mt8196): turn on APU smpu protection feat(mt8196): enable APU spmi operation feat(mt8196): add Mediatek MMinfra stub implementation feat(mt8196): enable cirq for MediaTek MT8196
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| #
5de1ace5 |
| 15-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): turn on APU smpu protection
1. Turn on APU SMPU protection on MT8196. 2. Remove unused header file.
Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b Signed-off-by: Karl Li <karl.l
feat(mt8196): turn on APU smpu protection
1. Turn on APU SMPU protection on MT8196. 2. Remove unused header file.
Change-Id: I58637b8dda4bf68253bc2329580963a8bd9cca8b Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
999503d2 |
| 24-Dec-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration
* changes: feat(mt8196): enable APU on mt8196 feat(mt8196): add APU SMMU hardware semaphore operations fea
Merge changes Ic746571b,I1926cab9,Id70162e9,I3a9b014e,Ic99adba1, ... into integration
* changes: feat(mt8196): enable APU on mt8196 feat(mt8196): add APU SMMU hardware semaphore operations feat(mt8196): add smpu protection for APU secure memory feat(mt8196): add APU RCX DevAPC setting feat(mt8196): add APU kernel control operations feat(mt8196): add APU power on/off functions feat(mt8196): add APUMMU setting feat(mt8196): enable apusys mailbox mpu protection feat(mt8196): enable apusys security control feat(mt8196): add APUSYS AO DevAPC setting feat(mt8196): add APU power-on init flow
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| #
3ee4b2de |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APU power on/off functions
1. Add APU power on/off functions 2. Refine the APU power on/off interface for mt8188 3. Add dcm setup function to support mt8196
Change-Id: Ie1caca40f8
feat(mt8196): add APU power on/off functions
1. Add APU power on/off functions 2. Refine the APU power on/off interface for mt8188 3. Add dcm setup function to support mt8196
Change-Id: Ie1caca40f89de71caac037fabe7e7455ff2a1872 Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
e534d4f6 |
| 15-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APUMMU setting
APUMMU is the MMU in APU, which is responsible for inner address mapping. The APU kernel driver will setup the APUMMU by SMC call.
Change-Id: Iad7532883e42c288aeb0d
feat(mt8196): add APUMMU setting
APUMMU is the MMU in APU, which is responsible for inner address mapping. The APU kernel driver will setup the APUMMU by SMC call.
Change-Id: Iad7532883e42c288aeb0d23ab419f4dc6d8630f2 Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
9059a375 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): enable apusys security control
Remap the request from domain 5, 7, 14 to domain 6 and setup security sideband
Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75 Signed-off-by: Karl
feat(mt8196): enable apusys security control
Remap the request from domain 5, 7, 14 to domain 6 and setup security sideband
Change-Id: I06d377f4bcc542bf22e0a04ffb45cf52b7528a75 Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
31a0b877 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APUSYS AO DevAPC setting
Apusys AO DevAPC is a set of control registers inside APU, controlling the access permission of APU AO (Always On) domain.
This patch add the mt8196 APU A
feat(mt8196): add APUSYS AO DevAPC setting
Apusys AO DevAPC is a set of control registers inside APU, controlling the access permission of APU AO (Always On) domain.
This patch add the mt8196 APU AO DevAPC setting to setup the protection.
Change-Id: I975a92795031cd1813442302890e29b671ef16f1 Signed-off-by: Karl Li <karl.li@mediatek.com>
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| #
0781f780 |
| 14-Nov-2024 |
Karl Li <karl.li@mediatek.com> |
feat(mt8196): add APU power-on init flow
Add the APU (AI processing unit) power init flow to prepare the hardware setting before using APU power functions.
Change-Id: I595b1d5100a4f083263de6527f920
feat(mt8196): add APU power-on init flow
Add the APU (AI processing unit) power init flow to prepare the hardware setting before using APU power functions.
Change-Id: I595b1d5100a4f083263de6527f920e5168700b7a Signed-off-by: Karl Li <karl.li@mediatek.com>
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