History log of /rk3399_ARM-atf/plat/marvell/octeontx/otx2/t91/t9130/platform.mk (Results 1 – 2 of 2)
Revision Date Author Comments
# 8f09da46 10-Aug-2020 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "release/14.0" into integration

* changes:
docs: marvell: update PHY porting layer description
docs: marvell: update path in marvell documentation
docs: marvell: updat

Merge changes from topic "release/14.0" into integration

* changes:
docs: marvell: update PHY porting layer description
docs: marvell: update path in marvell documentation
docs: marvell: update build instructions with CN913x
plat: marvell: octeontx: add support for t9130
plat: marvell: t9130: add SVC support
plat: marvell: t9130: update AVS settings
plat: marvell: t9130: pass actual CP count for load_image
plat: marvell: armada: a7k: add support to SVC validation mode
plat: marvell: armada: add support for twin-die combined memory device

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# 2c9d2636 09-Dec-2018 Grzegorz Jaszczyk <jaz@semihalf.com>

plat: marvell: octeontx: add support for t9130

CN-9130 has single CP0 inside the package and 2 additional one from MoChi
interface. In case of db-9130-modular board the MCI interface is routed to:
-

plat: marvell: octeontx: add support for t9130

CN-9130 has single CP0 inside the package and 2 additional one from MoChi
interface. In case of db-9130-modular board the MCI interface is routed to:
- on-board CP115 (MCI0)
- extension board CP115 (MCI1)

The board is based on DIMM DDR.

The 9130 has up to 3CP, and decoding windows looks like below:

(free for further use)
.----------. 0xf800 0000
| CP2 CFG |
'----------' 0xf600 0000
| CP1 CFG |
'----------' 0xf400 0000
| CP0 CFG |
'----------' 0xf200 0000
| AP CFG |
'----------' 0xf000 0000
(free for further use)
.----------. 0xec00 0000
| SPI |
| MEM_MAP | (Currently not opened)
'----------' 0xe800 0000
| PEX2_CP2 |
'----------' 0xe700 0000
| PEX1_CP2 |
'----------' 0xe600 0000
| PEX0-CP2 |
'----------'
.----------. 0xe500 0000
| PEX2_CP1 |
'----------' 0xe400 0000
| PEX1_CP1 |
'----------' 0xe300 0000
| PEX0-CP1 |
'----------'
.----------. 0xe200 0000
| PEX2-CP0 |
'----------' 0xe100 0000
| PEX1-CP0 |
'----------' 0xe000 0000
| PEX0-CP0 |
| 512MB |
'----------' 0xc000 0000

Change-Id: Ia8eee4f96c1043753f74f9da437b9f72ce2d6eb0
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

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