| #
8f09da46 |
| 10-Aug-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "release/14.0" into integration
* changes:
docs: marvell: update PHY porting layer description
docs: marvell: update path in marvell documentation
docs: marvell: updat
Merge changes from topic "release/14.0" into integration
* changes:
docs: marvell: update PHY porting layer description
docs: marvell: update path in marvell documentation
docs: marvell: update build instructions with CN913x
plat: marvell: octeontx: add support for t9130
plat: marvell: t9130: add SVC support
plat: marvell: t9130: update AVS settings
plat: marvell: t9130: pass actual CP count for load_image
plat: marvell: armada: a7k: add support to SVC validation mode
plat: marvell: armada: add support for twin-die combined memory device
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|
| #
48270689 |
| 06-Oct-2019 |
Moti Buskila <motib@marvell.com> |
plat: marvell: armada: add support for twin-die combined memory device
the twin-die combined memory device should be treated as
X8 device and not as X16 one. This patch is required to
re-enable comp
plat: marvell: armada: add support for twin-die combined memory device
the twin-die combined memory device should be treated as
X8 device and not as X16 one. This patch is required to
re-enable compilation after BLE (mv-ddr-marvell) firmware upgrade.
Change-Id: I41257ff2825164ebca85a84bbb8462d7b3447b97
Signed-off-by: Moti Buskila <motib@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
show more ...
|
| #
9935047b |
| 17-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration
* changes:
ddr: a80x0: add DDR 32-bit ECC mode support
ble: ap807: improve PLL configuration sequence
ble:
Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration
* changes:
ddr: a80x0: add DDR 32-bit ECC mode support
ble: ap807: improve PLL configuration sequence
ble: ap807: clean-up PLL configuration sequence
ddr: a80x0: add DDR 32-bit mode support
plat: marvell: mci: perform mci link tuning for all mci interfaces
plat: marvell: mci: use more meaningful name for mci link tuning
plat: marvell: a8k: remove wrong or unnecessary comments
plat: marvell: ap807: enable snoop filter for ap807
plat: marvell: ap807: update configuration space of each CP
plat: marvell: ap807: use correct address for MCIx4 register
plat: marvell: add support for PLL 2.2GHz mode
plat: marvell: armada: make a8k_common.mk and mss_common.mk more generic
marvell: armada: add extra level in marvell platform hierarchy
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| #
a2847172 |
| 05-Nov-2019 |
Grzegorz Jaszczyk <jaz@semihalf.com> |
marvell: armada: add extra level in marvell platform hierarchy
This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
pla
marvell: armada: add extra level in marvell platform hierarchy
This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
plat, include/plat) are moved to the new "armada" sub-folder.
Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
show more ...
|