| #
8de2ae5f |
| 16-Oct-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(intel): update outdated code for Linux direct boot" into integration
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| #
21a01dac |
| 04-Oct-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): update outdated code for Linux direct boot
1. Update emif rsthdshk macro
2. Update mailbox return status
3. Update bridge return status
Change-Id: I33905508aceb258ac8759c10079b2af977df
fix(intel): update outdated code for Linux direct boot
1. Update emif rsthdshk macro
2. Update mailbox return status
3. Update bridge return status
Change-Id: I33905508aceb258ac8759c10079b2af977df0e0a
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
show more ...
|
| #
816c27fb |
| 23-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes I38545567,I2f52d3ea into integration
* changes:
feat(intel): restructure sys mgr for S10/N5X
feat(intel): restructure sys mgr for Agilex
|
| #
6197dc98 |
| 17-May-2023 |
Jit Loon Lim <jit.loon.lim@intel.com> |
feat(intel): restructure sys mgr for Agilex
This patch is to restructure system manager. Move platform dependent
MACROs to individual platform system manager. Common system manager will
remain for t
feat(intel): restructure sys mgr for Agilex
This patch is to restructure system manager. Move platform dependent
MACROs to individual platform system manager. Common system manager will
remain for those common declaration only.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I2f52d3eaf47716f7dfc636bbf1a23d68a04f39cb
show more ...
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| #
b2534079 |
| 23-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bridge-en" into integration
* changes:
intel: Add function to check fpga readiness
intel: Add bridge control for FPGA reconfig
intel: FPGA config_isdone() status quer
Merge changes from topic "bridge-en" into integration
* changes:
intel: Add function to check fpga readiness
intel: Add bridge control for FPGA reconfig
intel: FPGA config_isdone() status query
intel: System Manager refactoring
intel: Refactor reset manager driver
intel: Enable bridge access in Intel platform
intel: Modify non secure access function
show more ...
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| #
3dcb94dd |
| 21-Oct-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Enable bridge access in Intel platform
Add bridge enablement features for each platform.
The bridge access will be enabled automatically for FPGA 1st
configuration only.
Signed-off-by: Hadi
intel: Enable bridge access in Intel platform
Add bridge enablement features for each platform.
The bridge access will be enabled automatically for FPGA 1st
configuration only.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I264757b257a209e1c3c4206660f21c5d67af0d2f
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| #
d1b6013d |
| 15-Aug-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "intel: agilex: Fix memory controller driver" into integration
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| #
b266d821 |
| 08-Aug-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: agilex: Fix memory controller driver
Increase calibration delay, fix ddrio control config & nonsecure region
limit
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
C
intel: agilex: Fix memory controller driver
Increase calibration delay, fix ddrio control config & nonsecure region
limit
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ibca3c247a3ad5104176ca9057d29755599f13c9b
show more ...
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| #
b514ee86 |
| 19-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "intel: Adds support for Agilex platform" into integration
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| #
2f11d548 |
| 27-Jun-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Adds support for Agilex platform
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef
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