| cde9f4f4 | 28-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since MAP_OPTEE_PAGEABLE isn't used in SRAM case,
hikey: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since MAP_OPTEE_PAGEABLE isn't used in SRAM case, just remove it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 383c8089 | 24-Jan-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Disable workaround for CVE-2017-5715 on unaffected platforms
Change-Id: Ib67b841ab621ca1ace3280e44cf3e1d83052cb73 Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com> |
| d5d5595a | 27-Jan-2018 |
Victor Chong <victor.chong@linaro.org> |
hikey: fix assert in sec_protect()
`assert(e)` was used in place of `if (e) ERROR()` when sec_protect() was ported from hikey fork so the logic should have been reversed.
Fixes: 3d5d9f5a ("hikey: c
hikey: fix assert in sec_protect()
`assert(e)` was used in place of `if (e) ERROR()` when sec_protect() was ported from hikey fork so the logic should have been reversed.
Fixes: 3d5d9f5a ("hikey: configure the top 16MB of DRAM as secure") Fixes: 52988b38 ("hikey: configure 4 MB of secure DRAM for OP-TEE Secure Data Path") Signed-off-by: Victor Chong <victor.chong@linaro.org> Tested-by: Victor Chong <victor.chong@linaro.org>
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| 5df27780 | 26-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1205 from petegriffin/hikey-protect-memory
Hikey protect optee / sdp memory |
| 8253eb57 | 25-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1231 from Leo-Yan/hikey960_enable_fiq_handling
Hikey960: Enable invalid FIQ handling |
| 52988b38 | 21-Dec-2017 |
Peter Griffin <peter.griffin@linaro.org> |
hikey: configure 4 MB of secure DRAM for OP-TEE Secure Data Path
Update the memory firewall configuration to reserve 4 MB of secure RAM for use by the kernel and OP-TEE as the Secure Data Path pool.
hikey: configure 4 MB of secure DRAM for OP-TEE Secure Data Path
Update the memory firewall configuration to reserve 4 MB of secure RAM for use by the kernel and OP-TEE as the Secure Data Path pool. Note that this address range (0x3E800000 - 0x3EC00000) falls in the range already set aside by UEFI (which reserves the upper 32 MB of the 1GB DRAM for OP-TEE [1]) and was previously unused.
[1] https://github.com/96boards-hikey/edk2/blob/hikey/HisiPkg/HiKeyPkg/Library/HiKeyLib/HiKeyMem.c#L44 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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| 3d5d9f5a | 04-May-2015 |
Jerome Forissier <jerome.forissier@linaro.org> |
hikey: configure the top 16MB of DRAM as secure
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE and should therefore be accessible only from secure world.
Signed-off-by: Jerome Forissier
hikey: configure the top 16MB of DRAM as secure
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE and should therefore be accessible only from secure world.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Victor Chong <victor.chong@linaro.org>
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| 15b54e7b | 15-Jan-2018 |
Victor Chong <victor.chong@linaro.org> |
poplar: Add support for recovery build
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org> |
| 59149bbe | 02-Jan-2018 |
Victor Chong <victor.chong@linaro.org> |
poplar: Enable emmc support
Let bl1 and bl2 have the ability to load images from emmc instead of dram (mmap).
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Shawn Guo <shawn.guo@li
poplar: Enable emmc support
Let bl1 and bl2 have the ability to load images from emmc instead of dram (mmap).
Signed-off-by: Victor Chong <victor.chong@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Shawn Guo <shawn.guo@linaro.org>
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| b79f7ed0 | 22-Jan-2018 |
Leo Yan <leo.yan@linaro.org> |
Hikey960: Enable invalid FIQ handling
When some interrupts are configured as group 0 in GICv2, these interrupts trigger FIQ signal; this results in the Linux kernel panic by reporting log: "Bad mode
Hikey960: Enable invalid FIQ handling
When some interrupts are configured as group 0 in GICv2, these interrupts trigger FIQ signal; this results in the Linux kernel panic by reporting log: "Bad mode in FIQ handler detected on CPU0, code 0x00000000 -- Unknown/Uncategorized". Unfortunately from kernel side it has no permission to read the GIC register for group 0 interrupts so we have no chance to get to know which interrupt is configured as secure interrupt and cause the kernel panic.
For upper reason, this commit enables FIQ exception handling for SPD_none case. If the system has not enabled SPD the FIQ interrupt is trapped into EL3 and the FIQ handler can report the interrupt number so we can easily narrow down which FIQ introduce unexpected interrupt. After enable SPD we can rely on SPD interrupt route model to handle FIQ.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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| 9fd4a36c | 17-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1211 from Leo-Yan/remove_ca73_cpu_nap_state
Hikey960: Remove ca73 cpu nap state |
| 4c8a5787 | 04-Jan-2018 |
Leo Yan <leo.yan@linaro.org> |
Hikey960: Change CPU standby state for WFI
At early time, the CPU CA73 retention state has been supported on Hikey960. Later we found the system has the hang issue and for resolving this issue Hisi
Hikey960: Change CPU standby state for WFI
At early time, the CPU CA73 retention state has been supported on Hikey960. Later we found the system has the hang issue and for resolving this issue Hisilicon released new MCU firmware, but unfortunately the new MCU firmware has side effect and results in the CA73 CPU cannot really enter retention state and roll back to WFI state.
After discussion we cannot see the possibility to enable CA73 retention state anymore on Hikey960, based on this conclusion we should remove this state supporting from ARM-TF and roll back to WFI state only. We will commit one patch to remove CA73 CPU retention state in kernel DT binding as well.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Kevin Wang <jean.wangtao@linaro.org> Cc: Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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| e1b27425 | 03-Jan-2018 |
Leo Yan <leo.yan@linaro.org> |
Revert "Hikey960: Change to use recommended power state id format"
This reverts commit fdae60b6ba27c216fd86d13b7432a1ff4f57dd84.
The commit fdae60b6ba27c216fd86d13b7432a1ff4f57dd84 changed the para
Revert "Hikey960: Change to use recommended power state id format"
This reverts commit fdae60b6ba27c216fd86d13b7432a1ff4f57dd84.
The commit fdae60b6ba27c216fd86d13b7432a1ff4f57dd84 changed the parameter encoding for the hikey960. However that implies a DT change in the kernel side. After submitting the DT change for upstreaming, the backward compatibility issue and the interface change raise some concerns from the Linux community about the issues related to kernel <-> ATF alignment. There is no way to detect a mis-alignment of those without a deep knowledge of the ATF and the kernel. Furthermore, the failing calls to PSCI in the idle path (because of bad parameters), will lead to busy looping, implying: thermal issues and extra energy consumption.
In regard of the Linux community concerns, the potential issues when the ATF and the kernel are not aligned, it is preferable to revert the commit.
Cc: Vincent Guittot <vincent.guittot@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Kevin Wang <jean.wangtao@linaro.org> Co-authored-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org>
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| 0cd67c39 | 16-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1216 from hzhuang1/fix_psci
Hikey960: Fix hikey960 pcie mount fail |
| 8d356425 | 10-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1207 from hzhuang1/isp_clk
hikey960: set isp clks as unsecure mode |
| 294d7471 | 09-Jan-2018 |
Kaihua Zhong <zhongkaihua@huawei.com> |
Hikey960: Fix hikey960 pcie mount fail
Set IOC_AO_IOMG_033 function from GPIO213 to PCIE_CLKREQ_N
bit[0-2]: 000: GPIO_213; 001: PCIE_CLKREQ_N; 010: GPIO_018_SH; 10
Hikey960: Fix hikey960 pcie mount fail
Set IOC_AO_IOMG_033 function from GPIO213 to PCIE_CLKREQ_N
bit[0-2]: 000: GPIO_213; 001: PCIE_CLKREQ_N; 010: GPIO_018_SH; 100: GPIO_014_SE; 110: FAC_TEST24; 111: FAC_TEST24; bit[3-31]: reserved
Signed-off-by: Guangtao Zhang <zhangguangtao@hisilicon.com> Tested-by: Yao Chen <chenyao11@huawei.com> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| c14d3dcd | 09-Jan-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1167 from Leo-Yan/hikey-fix-alignment
Set alignment size to 512B for Hikey/Hikey960 |
| f7ff1084 | 18-Dec-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: set isp clks as unsecure mode
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| f336774b | 27-Oct-2017 |
Victor Chong <victor.chong@linaro.org> |
poplar: Add BL32 (OP-TEE) support
Signed-off-by: Victor Chong <victor.chong@linaro.org> |
| d45a1c30 | 28-Aug-2017 |
Jiancheng Xue <xuejiancheng@hisilicon.com> |
Poplar: Initialize security properties of IP blocks.
The security properties of some IP blocks are configured to secure mode after reset. This means these IP blocks can only be accessed by cpus in s
Poplar: Initialize security properties of IP blocks.
The security properties of some IP blocks are configured to secure mode after reset. This means these IP blocks can only be accessed by cpus in secure state by default. These should be configured correclty as needed.
Signed-off-by: y00241285 <yyangwei.yangwei@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
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| 94725a26 | 27-Oct-2017 |
Victor Chong <victor.chong@linaro.org> |
poplar: Increase FIP_SIZE
This is currently the maximum allowed without affecting bootup.
Signed-off-by: Victor Chong <victor.chong@linaro.org> |
| 5a3ec61f | 26-Oct-2017 |
Victor Chong <victor.chong@linaro.org> |
poplar: Rename PLAT_ARM_NS_IMAGE_OFFSET
to PLAT_POPLAR_NS_IMAGE_OFFSET
Signed-off-by: Victor Chong <victor.chong@linaro.org> |
| 78896ac3 | 19-Oct-2017 |
Victor Chong <victor.chong@linaro.org> |
poplar: Fix GPIO_MAX
Per https://github.com/sdrobertw/Poplar/blob/master/HardwareDocs/Processor_Datasheet_v2XX.pdf there are 13 groups of GPIO controllers, not 12.
Signed-off-by: Victor Chong <vict
poplar: Fix GPIO_MAX
Per https://github.com/sdrobertw/Poplar/blob/master/HardwareDocs/Processor_Datasheet_v2XX.pdf there are 13 groups of GPIO controllers, not 12.
Signed-off-by: Victor Chong <victor.chong@linaro.org>
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| 211d307c | 11-Dec-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1178 from davidcunado-arm/dc/enable_sve
Enable SVE for Non-secure world |
| fdae60b6 | 24-Nov-2017 |
Leo Yan <leo.yan@linaro.org> |
Hikey960: Change to use recommended power state id format
ARM Power State Coordination Interface (ARM DEN 0022D) chapter 6.5 "Recommended StateID Encoding" defines the state ID which can be used by
Hikey960: Change to use recommended power state id format
ARM Power State Coordination Interface (ARM DEN 0022D) chapter 6.5 "Recommended StateID Encoding" defines the state ID which can be used by platforms. The recommended power states can be presented by below values; and it divides into three fields, every field has 4 bits to present power states corresponding to core level, cluster level and system level.
0: Run 1: Standby 2: Retention 3: Powerdown
This commit changes to use upper recommended power states definition on Hikey960; and changes the power state validate function to check the power state passed from kernel side.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
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