refactor(tc): deprecate Arm TC1 FVP platform

Arm has made the strategic decision to deprecate the TC1 platform.
Consequently, software development and the creation of fast models
for the TC1 platfor

refactor(tc): deprecate Arm TC1 FVP platform

Arm has made the strategic decision to deprecate the TC1 platform.
Consequently, software development and the creation of fast models
for the TC1 platform have been officially discontinued.
The TC1 platform, now considered obsolete, has been succeeded by
the TC2 platform. It's noteworthy that the TC2 platform is already
integrated and supported in both TF-A and CI repositories.

Change-Id: Ia196a5fc975b4dbf3c913333daf595199968d95d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(fvp): remove RSS usage

Removed RSS usage from the Base AEM FVP platform, as it wasn't
functional on this platform. The Base AEM FVP platform lacks
support for RSS.
Instead, the TC2 platform

refactor(fvp): remove RSS usage

Removed RSS usage from the Base AEM FVP platform, as it wasn't
functional on this platform. The Base AEM FVP platform lacks
support for RSS.
Instead, the TC2 platform with RSS is available for actual RSS
interface implementation and testing.

Change-Id: I8f68157319399ab526f9e851b26dba903db5c2e7
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "fix(arm): correct the SPMC_AT_EL3 condition" into integration

fix(arm): correct the SPMC_AT_EL3 condition

Addressed the SPMC_AT_EL3 condition by using '#if' instead of
'#if defined'. This change is warranted because the SPMC_AT_EL3
option is always defined.

C

fix(arm): correct the SPMC_AT_EL3 condition

Addressed the SPMC_AT_EL3 condition by using '#if' instead of
'#if defined'. This change is warranted because the SPMC_AT_EL3
option is always defined.

Change-Id: I76d9b8d502f452c58bc0040745d642cbe11dc8eb
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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chore(auth)!: remove CryptoCell-712/713 support

CryptoCell-712 and CryptoCell-713 drivers have been deprecated since
TF-A v2.9 and their removal was announced for TF-A v2.10 release.
See [1].

As th

chore(auth)!: remove CryptoCell-712/713 support

CryptoCell-712 and CryptoCell-713 drivers have been deprecated since
TF-A v2.9 and their removal was announced for TF-A v2.10 release.
See [1].

As the release is approaching, this patch deletes these drivers' code as
well as all references to them in the documentation and Arm platforms
code (Nuvoton platform is taken care in a subsequent patch). Associated
build options (ARM_CRYPTOCELL_INTEG and PLAT_CRYPTOCELL_BASE) have also
been removed and thus will have no effect if defined.

This is a breaking change for downstream platforms which use these
drivers.

[1] https://trustedfirmware-a.readthedocs.io/en/v2.9/about/release-information.html#removal-of-deprecated-drivers
Note that TF-A v3.0 release later got renumbered into v2.10.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Idabbc9115f6732ac1a0e52b273d3380677a39813

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feat(sgi): increase sp memmap size

With FF-A enabled on SP at SEL0 enabled, SPMC at EL3 needs more entries
to map newly added regions(SP, Rx/Tx buffer and Manifest).

Increase the PLAT_SP_IMAGE_MMAP

feat(sgi): increase sp memmap size

With FF-A enabled on SP at SEL0 enabled, SPMC at EL3 needs more entries
to map newly added regions(SP, Rx/Tx buffer and Manifest).

Increase the PLAT_SP_IMAGE_MMAP_REGIONS to 14 and MAX_XLAT_TABLES to 9.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I96fd291db8eb178f7aa73b5a9e38cfc67c66fa91

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feat(arm): save BL32 image base and size in entry point info

There is no platform function to retrieve the info in the generic code.
Populate the BL32 image base, size and max limit in arg2, arg3 an

feat(arm): save BL32 image base and size in entry point info

There is no platform function to retrieve the info in the generic code.
Populate the BL32 image base, size and max limit in arg2, arg3 and arg4.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: Id41cedd790ca1713787e5516fb84666d1ccb0b03

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feat(morello): add TF-A version string to NT_FW_CONFIG

TF-A version string is passed into NT_FW_CONFIG to allow access in
UEFI.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I9da7b9

feat(morello): add TF-A version string to NT_FW_CONFIG

TF-A version string is passed into NT_FW_CONFIG to allow access in
UEFI.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I9da7b93d30c9d9230ea9a2cd2730cde897ffc580

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feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version

SDS firmware version structure is added with MCC, PCC and SCP firmware
version members. These are set in NT_FW_CONFIG to provi

feat(morello): set NT_FW_CONFIG properties for MCC, PCC and SCP version

SDS firmware version structure is added with MCC, PCC and SCP firmware
version members. These are set in NT_FW_CONFIG to provide access to
firmware version information in UEFI.

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: Ib0c476e54ef428fb7904f0de5c6f4df6a5fbd7db

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Merge changes from topic "mp/exceptions" into integration

* changes:
docs(ras): update RAS documentation
docs(el3-runtime): update BL31 exception vector handling
fix(el3-runtime): restrict low

Merge changes from topic "mp/exceptions" into integration

* changes:
docs(ras): update RAS documentation
docs(el3-runtime): update BL31 exception vector handling
fix(el3-runtime): restrict lower el EA handlers in FFH mode
fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT
fix(ras): restrict ENABLE_FEAT_RAS to have only two states
feat(ras): use FEAT_IESB for error synchronization
feat(el3-runtime): modify vector entry paths

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fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT

This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
inter

fix(ras): remove RAS_FFH_SUPPORT and introduce FFH_SUPPORT

This patch removes RAS_FFH_SUPPORT macro which is the combination of
ENABLE_FEAT_RAS and HANDLE_EA_EL3_FIRST_NS. Instead introduce an
internal macro FFH_SUPPORT which gets enabled when platforms wants
to enable lower EL EA handling at EL3. The internal macro FFH_SUPPORT
will be automatically enabled if HANDLE_EA_EL3_FIRST_NS is enabled.
FFH_SUPPORT along with ENABLE_FEAT_RAS will be used in source files
to provide equivalent check which was provided by RAS_FFH_SUPPORT
earlier. In generic code we needed a macro which could abstract both
HANDLE_EA_EL3_FIRST_NS and RAS_FFH_SUPPORT macros that had limitations.
Former was tied up with NS world only while the latter was tied to RAS
feature.

This is to allow Secure/Realm world to have their own FFH macros
in future.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ie5692ccbf462f5dcc3f005a5beea5aa35124ac73

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Merge changes from topic "hst/cs1k-add-gpt-support" into integration

* changes:
feat(bl2): add gpt support
fix(corstone-1000): modify boot device dependencies
fix(corstone-1000): removing the

Merge changes from topic "hst/cs1k-add-gpt-support" into integration

* changes:
feat(bl2): add gpt support
fix(corstone-1000): modify boot device dependencies
fix(corstone-1000): removing the signature area

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fix(ras): restrict ENABLE_FEAT_RAS to have only two states

As part of migrating RAS extension to feature detection mechanism, the
macro ENABLE_FEAT_RAS was allowed to have dynamic detection (FEAT_ST

fix(ras): restrict ENABLE_FEAT_RAS to have only two states

As part of migrating RAS extension to feature detection mechanism, the
macro ENABLE_FEAT_RAS was allowed to have dynamic detection (FEAT_STATE
2). Considering this feature does impact execution of EL3 and we need
to know at compile time about the presence of this feature. Do not use
dynamic detection part of feature detection mechanism.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I23858f641f81fbd81b6b17504eb4a2cc65c1a752

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feat(bl2): add gpt support

This includes initialization of the partition with
the GPT_IMAGE_ID.

Change-Id: I51b09d82ff40207369d76011556f40169196af22
Signed-off-by: Mohamed Omar Asaker <mohamed.omar

feat(bl2): add gpt support

This includes initialization of the partition with
the GPT_IMAGE_ID.

Change-Id: I51b09d82ff40207369d76011556f40169196af22
Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>

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fix(corstone-1000): modify boot device dependencies

Modify boot device dependencies and remove the one's
which are not needed.

Change-Id: I71cd60558ab4bb5162afefad4f00d631c2308e72
Signed-off-by: Mo

fix(corstone-1000): modify boot device dependencies

Modify boot device dependencies and remove the one's
which are not needed.

Change-Id: I71cd60558ab4bb5162afefad4f00d631c2308e72
Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>

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Merge changes from topic "hm/mpam" into integration

* changes:
fix(build): convert tabs and ifdef comparisons
fix(build): disable ENABLE_FEAT_MPAM for Aarch32

Merge "refactor(fvp): do not use RSS platform token and attestation key APIs" into integration

fix(build): disable ENABLE_FEAT_MPAM for Aarch32

Disable FEAT_MPAM support for Aarch32 as it is not supported, following
[1]. ENABLE_FEAT_MPAM is set to 2 by default for Aarch64 in
arch_features.mk,

fix(build): disable ENABLE_FEAT_MPAM for Aarch32

Disable FEAT_MPAM support for Aarch32 as it is not supported, following
[1]. ENABLE_FEAT_MPAM is set to 2 by default for Aarch64 in
arch_features.mk, eliminating the need for duplication in the platform
makefile.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/23710

Change-Id: I1c8b6844254e00e6372900f1c87f995f292ae65c
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(corstone-1000): removing the signature area

The TF-M on the secure enclave side takes care of boot bank selection for our platform. The TF-A doesn't require to manage the boot bank, so,
removing

fix(corstone-1000): removing the signature area

The TF-M on the secure enclave side takes care of boot bank selection for our platform. The TF-A doesn't require to manage the boot bank, so,
removing the boot bank selection. TF-A doesn't expect the signature area so removed it from FIP partition

Change-Id: I298dd51fa068534c299c66b0e4c353819ea12a26
Signed-off-by: Mohamed Omar Asaker <mohamed.omarasaker@arm.com>
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>

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Merge changes from topic "hm/post-image" into integration

* changes:
refactor(fvp): move image handling into generic procedure
refactor(bl2): make post image handling platform-specific

Merge changes from topic "gr/build_refactor" into integration

* changes:
build(refactor): avoid ifdef comparison
refactor(build): avoid using values for comparison
refactor(build): reorder arc

Merge changes from topic "gr/build_refactor" into integration

* changes:
build(refactor): avoid ifdef comparison
refactor(build): avoid using values for comparison
refactor(build): reorder arch features handling
build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR
refactor(build): reorder platform Makefile evaluation

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refactor(build): avoid using values for comparison

With changes to refactor to use first platform makefiles
then parse arch_features.mk file 'ENABLE_RME' will be initialised
only when we define duri

refactor(build): avoid using values for comparison

With changes to refactor to use first platform makefiles
then parse arch_features.mk file 'ENABLE_RME' will be initialised
only when we define during build or at arch_features.mk thus
making comparison of 'ENABLE_RME' to '0' incorrect.

So keep BRBE disabled when RME is enabled at main makefile level.

Change-Id: I7e3d99eb444678d63585bd5971ada627cfc4fcc9
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR

n1sdp based out of Arm Neoverse N1 Core uses Arm®v8.2‑A extensions
so set ARM_ARCH_MAJOR.ARM_ARCH_MINOR for n1sdp platform to 8.2

Change-Id: Ib70c6be

build(n1sdp): add ARM_ARCH_MAJOR.ARM_ARCH_MINOR

n1sdp based out of Arm Neoverse N1 Core uses Arm®v8.2‑A extensions
so set ARM_ARCH_MAJOR.ARM_ARCH_MINOR for n1sdp platform to 8.2

Change-Id: Ib70c6be5e12817961430870d50fb1b0efca32df2
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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Merge changes from topic "mb/psa-crypto-ecdsa" into integration

* changes:
docs: mark PSA_CRYPTO as an experimental feature
feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
feat(m

Merge changes from topic "mb/psa-crypto-ecdsa" into integration

* changes:
docs: mark PSA_CRYPTO as an experimental feature
feat(fvp): increase BL1 RW area for PSA_CRYPTO implementation
feat(mbedtls-psa): mbedTLS PSA Crypto with ECDSA

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refactor(fvp): move image handling into generic procedure

Post image handling of the HW_CONFIG is out-of-scope for
`plat_get_next_bl_params`. Move parts of the code responsible for post
processing o

refactor(fvp): move image handling into generic procedure

Post image handling of the HW_CONFIG is out-of-scope for
`plat_get_next_bl_params`. Move parts of the code responsible for post
processing of loaded images into `bl2_plat_handle_post_image_load` for code
reusability and maintainability.

Change-Id: I476b3d306ebcd4529f5e542ba1063e144920bb5f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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