fix(rd1ae): rename legacy MPAM build option

ENABLE_MPAM_FOR_LOWER_ELS was renamed to ENABLE_FEAT_MPAM a while ago,
but the rd1ae platform Makefile still carries the old name, probably due
to the ups

fix(rd1ae): rename legacy MPAM build option

ENABLE_MPAM_FOR_LOWER_ELS was renamed to ENABLE_FEAT_MPAM a while ago,
but the rd1ae platform Makefile still carries the old name, probably due
to the upstreaming overlapping with the rename.

Replace the old build option with the proper name, to make sure that
MPAM support gets compiled in without runtime checks.

Change-Id: If082e7250a7a3d12c7cbef5126303da1ee07a3af
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "feat(psci): remove cpu context init by index" into integration

feat(psci): remove cpu context init by index

Currently, the calling core (meaning the core which received the call to
CPU_ON or the powerdown path of CPU_SUSPEND on the same core) is in
charge of in

feat(psci): remove cpu context init by index

Currently, the calling core (meaning the core which received the call to
CPU_ON or the powerdown path of CPU_SUSPEND on the same core) is in
charge of initialising the context for the waking core (the warmboot
entrypoint for both). This is convenient because the calling core can
write the context while in coherency and the waking core will only need
the context after its entered coherency. This avoids any cache
maintenance and makes communication simple.

However, this has 3 main problems:
a) asymmetric feature support is problematic - the calling core has no
way of knowing the feature set of the waking core. If the two
diverge, the architectural feature discovery via ID registers breaks
down. We've thus far "fixed" this on a case by case basis which
doesn't scale and introduces redundancy.

b) powerdown abandon (pabandon) introduces a contradiction - the calling
core has to initialise the context for when the core wakes up, but
should the core not powerdown it needs its old context intact. The only
way to work around this is by keeping two copies of context which
incurs a runtime and memory overhead.

c) cm_prepare_el3_exit[_ns]() doesn't have access to the entrypoint but needs
it to make initialisation decisions. We can infer some of this from
registers that have already been written but this is awkwardly
limiting for what we can do. This also necessitates the split from
the context initialisation.

We can solve all three by a making a core be in full ownership of its
own context. The calling core then only writes entrypoint information
and nothing else. The waking core then initialises its own context as it
sees fit with full knowledge of the whole picture.

The only tricky bit is cache coherency - the waking core has to be able
to coherently observe its new entrypoint. Calling cores will write to
the shared region with coherent caches on. If we make sure to read the
context only after the waking core has entered coherency, then we can
avoid cache operations and let hardware handle everything.

We can skip the spsr check for FEAT_TCR2 as it doesn't make a
difference. We can also skip enabling it twice from generic code.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I86e7fe8b698191fc3b469e5ced1fd010f8754b0e

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Merge changes from topic "nrd1_deprecation" into integration

* changes:
docs(changelog): remove RD-E1-Edge platform's scope
docs(maintainers): add RD-V3 variants to maintained paths
feat(neove

Merge changes from topic "nrd1_deprecation" into integration

* changes:
docs(changelog): remove RD-E1-Edge platform's scope
docs(maintainers): add RD-V3 variants to maintained paths
feat(neoverse_rd): deprecate and remove RD-V1 platform variants
feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants
feat(neoverse_rd): deprecate and remove SGI-575 platform

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Merge changes from topic "hm/evlog" into integration

* changes:
refactor(rpi3): use renamed event log printer
refactor(imx8m): use renamed event log printer
refactor(qemu): use renamed event l

Merge changes from topic "hm/evlog" into integration

* changes:
refactor(rpi3): use renamed event log printer
refactor(imx8m): use renamed event log printer
refactor(qemu): use renamed event log printer
refactor(fvp): use renamed event log printer
refactor(measured-boot): standardize function names

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Merge changes Ie33671b0,I1543aa6d into integration

* changes:
docs(fvp): clarify what `FVP` means
fix(fvp): allow PSCI 0.2 in the device tree

feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The prim

feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The primary goal of this patch is to only to verify the basic
functionality and ensure the implemented functions return the
correct return values.

The test uses random values for the ecam address, rootport ID,
IDE stream info, keys, and IV values.

Change-Id: Icf47627da9a6a7dd0d6e40e20ac94cc977072177
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM

feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM-IDE-KM-Interface

Three IDE Key management smc calls have been added:
- RMM_IDE_KEY_PROG()
- RMM_IDE_KEY_SET_GO()
- RMM_IDE_KEY_SET_STOP()
- RMM_IDE_KM_PULL_RESPONSE()

Due to the absence of root port support in FVP, we are
currently adding placeholders in this patch for the platform
APIs to return success irrespective of the arguments being passed
by the caller(Realms). The SMCs are guarded by
`RMMD_ENABLE_IDE_KEY_PROG` build flag and is disabled by default.
We expect that once the SMCs are stabilized, this build flag will
not be required anymore.

Change-Id: I9411eb7787dac2a207bd14710d251503bd9626ce
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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fix(rdv3): correctly define plat_mboot_measure_key()

The function is declared with 2 const parameters, however it is defined
without the const qualifiers, leading to compiler warnings.

Change-Id: I

fix(rdv3): correctly define plat_mboot_measure_key()

The function is declared with 2 const parameters, however it is defined
without the const qualifiers, leading to compiler warnings.

Change-Id: Ibe021336ea50e2028799bd6b1f0c5b513490185d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(fvp): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update FVP to use the new function names
for consistency with the

refactor(fvp): use renamed event log printer

Following the renaming of printer functions to follow the
event_log_{func} convention, update FVP to use the new function names
for consistency with the logging library.

Change-Id: I1c3b1311d51174c76903e147c28d51f986b52712
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(neoverse_rd): deprecate and remove RD-V1 platform variants

deprecate and remove support for RD-V1 and RD-V1-MC platform variants.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id:

feat(neoverse_rd): deprecate and remove RD-V1 platform variants

deprecate and remove support for RD-V1 and RD-V1-MC platform variants.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Ifab7b95e00615806986e316e0bde7788dc8af04f

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feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants

deprecate and remove support for RD-N1-Edge and RD-N1-Edgex2 platform
variants.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.co

feat(neoverse_rd): deprecate and remove RD-N1-Edge platform variants

deprecate and remove support for RD-N1-Edge and RD-N1-Edgex2 platform
variants.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I59dce73b70014b3416d89b0d024d7204356b1b77

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feat(neoverse_rd): deprecate and remove SGI-575 platform

deprecate and remove support for SGI-575 platform.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Iffee2fa8f4faa463c4b4df5911

feat(neoverse_rd): deprecate and remove SGI-575 platform

deprecate and remove support for SGI-575 platform.

Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Iffee2fa8f4faa463c4b4df591182f72a461c880b

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Merge "fix(juno): resolve BL2 RAM overflow with RSA+ECDSA in GCC(14.2.1)" into integration

feat(fvp): support AArch32 booting with handoff

Enable AArch32 SP_MIN booting on the FVP platform using Firmware
Handoff. Update plat_arm_sp_min_early_platform_setup() to parse boot
arguments passed

feat(fvp): support AArch32 booting with handoff

Enable AArch32 SP_MIN booting on the FVP platform using Firmware
Handoff. Update plat_arm_sp_min_early_platform_setup() to parse boot
arguments passed via the Firmware Handoff framework.

Also, adjust the maximum BL32 size calculation to use
PLAT_ARM_FW_HANDOFF_SIZE when TRANSFER_LIST is enabled.

Change-Id: I82032b1cebf8b37ff24dde4f2d07f7aaede33eb6
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(arm): support AArch32 booting with handoff

Configre SP-MIN to receive information via the firmare handoff
framework. In BL1 and BL2, select the 32-bit variants of the SRAM layout
and entry poin

feat(arm): support AArch32 booting with handoff

Configre SP-MIN to receive information via the firmare handoff
framework. In BL1 and BL2, select the 32-bit variants of the SRAM layout
and entry point info to enable booting in aarch32 mode. In SP-MIN
process expected data directly from the transfer list in secure memory.

Change-Id: If0417cdd4c47b772332eb6fd4b71ef0ea474f0fa
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(xlat): remove xlat_mpu

The only platform to use this is fvp_r. As this platform is now gone, so
is the need for this library. Support for it never went out of
"experimental" so it does not appea

fix(xlat): remove xlat_mpu

The only platform to use this is fvp_r. As this platform is now gone, so
is the need for this library. Support for it never went out of
"experimental" so it does not appear to be finished.

Change-Id: I76499b92ca4368651330f17dc80803991158cc36
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(juno): resolve BL2 RAM overflow with RSA+ECDSA in GCC(14.2.1)

* Using "TF_MBEDTLS_RSA_AND_ECDSA" algorithm with toolchain 14.2.1
causes the BL2 image to exceed RAM limits, triggering a link er

fix(juno): resolve BL2 RAM overflow with RSA+ECDSA in GCC(14.2.1)

* Using "TF_MBEDTLS_RSA_AND_ECDSA" algorithm with toolchain 14.2.1
causes the BL2 image to exceed RAM limits, triggering a link error
("region `RAM' overflowed by 4096 bytes").

* Resolved by increasing PLAT_ARM_MAX_BL2_SIZE by 4KB to accommodate
the larger image.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie9d411c1207801436d8cffcf72fec2752371eb69

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Merge "fix(plat): remove fvp_r" into integration

fix(trng): allow FEAT_RNG_TRAP in dynamic fashion

The documentation promises for ENABLE_FEAT_RNG_TRAP to support the
numeric semantics, with a value of "2" meaning runtime detection. However
two pla

fix(trng): allow FEAT_RNG_TRAP in dynamic fashion

The documentation promises for ENABLE_FEAT_RNG_TRAP to support the
numeric semantics, with a value of "2" meaning runtime detection. However
two places in the build system did not support this, instead were just
checking for a value of "1".

Fix the AArch32 check and build the FVP specific handler routine when
the value is not "0", instead of relying on it to be exactly "1".

Change-Id: I1acd3ed6d2a461d541b9bf57e4aac9c0798ab56b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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Merge "fix(arm): resolve misra rule R11.6 violation" into integration

fix(plat): remove fvp_r

The platform has not been maintained for some years and is generally
broken. Remove it to avoid confusion.

Change-Id: I93d832d51e114689ec79969af5d96071a03f4a88
Signed-off-by

fix(plat): remove fvp_r

The platform has not been maintained for some years and is generally
broken. Remove it to avoid confusion.

Change-Id: I93d832d51e114689ec79969af5d96071a03f4a88
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option

Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.

Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3
Signed-off

fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option

Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.

Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(arm): resolve misra rule R11.6 violation

Fixed below MISRA violation:
- MISRA violation: MC3R1.R11.6:
- A cast shall not be performed between a pointer to void and an
arithmetic data type.

fix(arm): resolve misra rule R11.6 violation

Fixed below MISRA violation:
- MISRA violation: MC3R1.R11.6:
- A cast shall not be performed between a pointer to void and an
arithmetic data type. (i.e cast from integer to void*)
- Fix:
- cast via portable and misra compliant type "uintptr_t" and
use 0U instead of NULL for comparisons.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie3a7561d9a254027c5364485a1d72fc1320dfcad

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feat(tc): port BL31-BL33 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL31 and BL33 on TC.

Signed-off-by: Jayanth Dodderi

feat(tc): port BL31-BL33 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL31 and BL33 on TC.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ia6cd29c8b6cdda0a127a3bac02f6fa1dcfc07151

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