1 /* 2 * Copyright (c) 2018-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef NRD_VARIANT_H 8 #define NRD_VARIANT_H 9 10 /* SID Version values for RD-N1E1-Edge */ 11 #define RD_N1E1_EDGE_SID_VER_PART_NUM 0x0786 12 #define RD_E1_EDGE_CONFIG_ID 0x2 13 14 /* SID Version values for RD-V1 */ 15 #define RD_V1_SID_VER_PART_NUM 0x078a 16 17 /* SID Version values for RD-N2 */ 18 #define RD_N2_SID_VER_PART_NUM 0x07B7 19 20 /* SID Version values for RD-N2 variants */ 21 #define RD_N2_CFG1_SID_VER_PART_NUM 0x07B6 22 #define RD_N2_CFG3_SID_VER_PART_NUM 0x07F1 23 24 /* SID Version values for RD-V2 */ 25 #define RD_V2_SID_VER_PART_NUM 0x07F2 26 #define RD_V2_CONFIG_ID 0x1 27 28 /* SID Version values for RD-V3 */ 29 #define RD_V3_SID_VER_PART_NUM 0x07EE 30 #define RD_V3_CONFIG_ID 0x0 31 32 /* SID Version values for RD-V3 variants */ 33 #define RD_V3_CFG1_SID_VER_PART_NUM 0x07F9 34 #define RD_V3_CFG2_SID_VER_PART_NUM 0x07EE 35 36 /* Structure containing Neoverse RD platform variant information */ 37 typedef struct nrd_platform_info { 38 unsigned int platform_id; /* Part Number of the platform */ 39 unsigned int config_id; /* Config Id of the platform */ 40 unsigned int chip_id; /* Chip Id or Node number */ 41 unsigned int multi_chip_mode; /* Multi-chip mode availability */ 42 } nrd_platform_info_t; 43 44 extern nrd_platform_info_t nrd_plat_info; 45 46 /* returns the part number of the platform*/ 47 unsigned int plat_arm_nrd_get_platform_id(void); 48 49 /* returns the configuration id of the platform */ 50 unsigned int plat_arm_nrd_get_config_id(void); 51 52 /* returns true if operating in multi-chip configuration */ 53 unsigned int plat_arm_nrd_get_multi_chip_mode(void); 54 55 #endif /* NRD_VARIANT_H */ 56