| 557bc9dc | 09-Dec-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes:
fix(scmi): change function prototype to fix gcc error
fix(rdn1edge): change variable type to fix gcc sign conversion
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes:
fix(scmi): change function prototype to fix gcc error
fix(rdn1edge): change variable type to fix gcc sign conversion error
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| a0f256b0 | 08-Dec-2022 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "fix(rmmd): add missing padding to RMM Boot Manifest and initialize it" into integration |
| f0f2c903 | 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expre
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expressions". Changing channel_id type to unsigned int since it can
never be a negative value.
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: I579b21497329db40897c10d86c8fc68e4877f3db
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| 3a3e0e53 | 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(rdn1edge): change variable type to fix gcc sign conversion error
Change variable type in function bl31_platform_setup() to fix the GCC
sign conversion error "comparison between signed and unsign
fix(rdn1edge): change variable type to fix gcc sign conversion error
Change variable type in function bl31_platform_setup() to fix the GCC
sign conversion error "comparison between signed and unsigned integer
expressions".
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com>
Change-Id: Iff914bd7ad521883723c8fb34dd893412cce7fc5
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| dc0ca64e | 01-Dec-2022 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
fix(rmmd): add missing padding to RMM Boot Manifest and initialize it
This patch also:
* Enforces the check of RES0 fields on EL3-RMM boot interface
and manifest
* Fixes a couple of
fix(rmmd): add missing padding to RMM Boot Manifest and initialize it
This patch also:
* Enforces the check of RES0 fields on EL3-RMM boot interface
and manifest
* Fixes a couple of nits on the EL3-RMM Boot Interface
documentation.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Idb9e38f9fcda2ba0655646a1e2c4fdbabd5cdc40
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| b8dbfacc | 07-Dec-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rmm): add support for the 2nd DRAM bank" into integration |
| 346cfe2b | 29-Nov-2022 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
feat(rmm): add support for the 2nd DRAM bank
This patch adds support for RMM granules allocation
in FVP 2nd DRAM 2GB bank at 0x880000000 base address.
For ENABLE_RME = 1 case it also removes "mem=1G
feat(rmm): add support for the 2nd DRAM bank
This patch adds support for RMM granules allocation
in FVP 2nd DRAM 2GB bank at 0x880000000 base address.
For ENABLE_RME = 1 case it also removes "mem=1G"
Linux kernel command line option in fvp-base-psci-common.dsti
to allow memory layout discovery from the FVP device tree.
FVP parameter 'bp.dram_size' - size of main memory in gigabytes
documented in docs/components/realm-management-extension.rst
is changed from 2 to 4.
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: I174da4416ad5a8d41bf0ac89f356dba7c0cd3fe7
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| 0312769f | 06-Dec-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(arm): remove unused global" into integration |
| d8359cfa | 04-Dec-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(arm): remove unused global
Removed unused global from the assembly file.
Change-Id: I17ab70aa888af27865a9fb4436495197f460780f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> |
| 7f3d9eae | 18-Nov-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(fvp): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as
refactor(fvp): pass platform metadata as a function's argument
Based on the prototype modification of the event_log_measure_and_record
function in the previous patch, platform metadata was passed as an
argument.
Change-Id: Id1bf59c243c483d7e32152f094c693e95d29fe2b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 42c70c08 | 11-Nov-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
build: deprecate Arm TC0 FVP platform
Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superse
build: deprecate Arm TC0 FVP platform
Arm has decided to deprecate the TC0 platform. The development of
software and fast models for TC0 platform has been discontinued.
TC0 platform has been superseded by the TC1 and TC2 platforms,
which are already supported in TF-A and CI repositories.
Change-Id: I0269816a6ee733f732669027eae4e14cd60b6084
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| f41e23ea | 10-Nov-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mp/ras_refactoring" into integration
* changes:
docs: document do_panic() and panic() helper functions
fix(ras): restrict RAS support for NS world |
| 5605c442 | 09-Nov-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "rdn2cfg2_spi_support" into integration
* changes:
feat(rdn2): enable extended SPI support
feat(rdn2): add SPI ID ranges for RD-N2 multichip platform |
| 46cc41d5 | 10-Oct-2022 |
Manish Pandey <manish.pandey2@arm.com> |
fix(ras): restrict RAS support for NS world
Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To
fix(ras): restrict RAS support for NS world
Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.
Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750
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| 4202cd51 | 03-Nov-2022 |
Diego Sueiro <diego.sueiro@arm.com> |
build(bl2): only set BL2_CPPFLAGS for armv8
If ARM_ARCH_MAJOR is 9 and ARM_ARCH_MINOR is 0 we don't want need to
have "-march=armv8-a+crc" in BL2_CPPFLAGS.
Change-Id: I9ac11522fde00953da40b95eebf82
build(bl2): only set BL2_CPPFLAGS for armv8
If ARM_ARCH_MAJOR is 9 and ARM_ARCH_MINOR is 0 we don't want need to
have "-march=armv8-a+crc" in BL2_CPPFLAGS.
Change-Id: I9ac11522fde00953da40b95eebf82ff8ab2559ba
Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
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| 07dc8ba9 | 19-Oct-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
build: deprecate Arm rdn1edge and sgi575 FVP platforms
Arm has decided to deprecate the sgi575 and rdn1edge platforms.
The development of software and fast models for these platforms
has been discon
build: deprecate Arm rdn1edge and sgi575 FVP platforms
Arm has decided to deprecate the sgi575 and rdn1edge platforms.
The development of software and fast models for these platforms
has been discontinued. rdn1edge platform has been superseded by the
rdn2 platform, which is already supported in TF-A and CI work is
underway for this platform.
Change-Id: If2228fb73549b244c3a5b0e5746617b3f24fe771
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 4e7983b7 | 20-Oct-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(ethos-n)!: add support for SMMU streams" into integration |
| 108488f9 | 14-Sep-2022 |
Vivek Gautam <vivek.gautam@arm.com> |
feat(rdn2): enable extended SPI support
Enable the GIC_EXT_INTID configuration to support extended interrupt
IDs for RD-N2 multichip platform.
Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>
Cha
feat(rdn2): enable extended SPI support
Enable the GIC_EXT_INTID configuration to support extended interrupt
IDs for RD-N2 multichip platform.
Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>
Change-Id: Ic8d59ba0e692e5f13f3cdeffc64d76cd4741aa11
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| 9f0835e9 | 12-Jul-2022 |
Vivek Gautam <vivek.gautam@arm.com> |
feat(rdn2): add SPI ID ranges for RD-N2 multichip platform
Add the SPI ID ranges for various chips on RD-N2 multichip platform
(rdn2cfg2). Also fix the max SPI ID for chip#0 that was incorrectly
set
feat(rdn2): add SPI ID ranges for RD-N2 multichip platform
Add the SPI ID ranges for various chips on RD-N2 multichip platform
(rdn2cfg2). Also fix the max SPI ID for chip#0 that was incorrectly
set.
The SPI ranges for rdn2cfg2 platform are as shown below:
============================================
Chip# | CHIP_START_INTID | CHIP_END_INTID
============================================
0 | 32 | 511
1 | 512 | 991
2 | 4096 | 4575
3 | 4576 | 5055
Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>
Change-Id: I146944af1ffe52c300eef2ef48b1077a9559bf41
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| 0271eddb | 12-Oct-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
feat(fvp): build delegated attestation in BL31
Right now, the delegated attestation module is not used in TF-A. This
means it's not even getting built and so the CI system cannot detect
build regres
feat(fvp): build delegated attestation in BL31
Right now, the delegated attestation module is not used in TF-A. This
means it's not even getting built and so the CI system cannot detect
build regressions.
Eventually, delegated attestation will be involved in a new runtime
service exposed by BL31 to lower exception levels. We are not there
yet but let's already include it into BL31 image, so we get build
coverage and static analysis on the code. Note that we make sure to
cover both PLAT_RSS_NOT_SUPPORTED=0 and PLAT_RSS_NOT_SUPPORTED=1
configurations.
Delegated attestation is currently made dependent on measured boot
support. This dependency is not at the source code level (attestation
code does not invoke any measured boot interfaces) but it is rather a
logical dependency: attestation without boot measurements is not very
useful...
For now, this is good enough for our purpose but the conditions under
which the attestation code is included might change in the future.
Change-Id: I616715c3dd0418a1bbf1019df3ff9acd8461e705
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 8e75b542 | 11-Oct-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "feat(cpu): add library support for Hunter ELP" into integration |
| 8c87becb | 03-Oct-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(cpu): add library support for Hunter ELP
Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the
feat(cpu): add library support for Hunter ELP
Add basic CPU library code to support the Hunter ELP CPU in TF-A.
Hunter-ELP adds v9.2 architecture support and is derived from
Makalu-ELP. As such, the library code is adapted from the
Makalu-ELP support library.
Change-Id: I7e93b9af6b1f0bc4d08c3cf5caf071d2cbdbc89f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 6cb5d326 | 16-Sep-2022 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): enable RSS backend based measured boot
Measurements taken during boot are stored in RSS.
These measurements are included in the platform
attestation token.
Change-Id: Iac3356f813fb4173156
feat(tc): enable RSS backend based measured boot
Measurements taken during boot are stored in RSS.
These measurements are included in the platform
attestation token.
Change-Id: Iac3356f813fb417315681c718839319832a76191
Signed-off-by: David Vincze <david.vincze@arm.com>
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
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| e6c13165 | 04-May-2022 |
David Vincze <david.vincze@arm.com> |
feat(tc): increase maximum BL1/BL2/BL31 sizes
The maximum size of BL1/BL2/BL31 is increased due to
the added new functionalities, such as RSS based
measured boot on TC2.
Change-Id: I939c7c3da6bf870
feat(tc): increase maximum BL1/BL2/BL31 sizes
The maximum size of BL1/BL2/BL31 is increased due to
the added new functionalities, such as RSS based
measured boot on TC2.
Change-Id: I939c7c3da6bf870db46b32cd2836c6737de278bb
Signed-off-by: David Vincze <david.vincze@arm.com>
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
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| 70247ddb | 05-Oct-2022 |
Tamas Ban <tamas.ban@arm.com> |
fix(rss): rename AP-RSS message size macro
Adding PLAT_* prefix to indicate that the
platform needs to provide this definition.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I0bd02be405fd
fix(rss): rename AP-RSS message size macro
Adding PLAT_* prefix to indicate that the
platform needs to provide this definition.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I0bd02be405fd8b1e625bd2b82647ebb2b58265fc
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