| #
001f22cd |
| 08-Jan-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(tc): print ni-tower discovery tree" into integration
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| #
d87a8562 |
| 27-Jun-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): print ni-tower discovery tree
print ni-tower discovery tree to understand ni-tower hierarchy which
might be useful during debugging.
Change-Id: Ib49fef9c63f7740e04b4d8371c1083bd040f6e09
S
feat(tc): print ni-tower discovery tree
print ni-tower discovery tree to understand ni-tower hierarchy which
might be useful during debugging.
Change-Id: Ib49fef9c63f7740e04b4d8371c1083bd040f6e09
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
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| #
18faaa24 |
| 05-Aug-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "us_pmu" into integration
* changes:
fix(tc): correct CPU PMU binding
feat(tc): add device tree binding for SPE
feat(tc): add PPI partitions in DT binding
feat(tc):
Merge changes from topic "us_pmu" into integration
* changes:
fix(tc): correct CPU PMU binding
feat(tc): add device tree binding for SPE
feat(tc): add PPI partitions in DT binding
feat(tc): change GIC DT property 'interrupt-cells' to 4
feat(tc): add NI-Tower PMU node for TC3
feat(tc): setup ni-tower non-secure access for TC3
show more ...
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| #
89c58a50 |
| 02-Feb-2024 |
Jagdish Gediya <jagdish.gediya@arm.com> |
feat(tc): setup ni-tower non-secure access for TC3
NI-Tower's component's registers are need to be accessed from
kernel NI-PMU driver so enable NS access to it.
Change-Id: I83a8b3a1d2778baf767ff932
feat(tc): setup ni-tower non-secure access for TC3
NI-Tower's component's registers are need to be accessed from
kernel NI-PMU driver so enable NS access to it.
Change-Id: I83a8b3a1d2778baf767ff93263e246d127ef8114
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
show more ...
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