| 269f3dae | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mp/feat_ras" into integration
* changes: refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED refactor(ras): replace RAS_EXTENSION with FEAT_RAS |
| fdf9d768 | 09-May-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "srm/Errata_ABI_El3" into integration
* changes: docs(errata_abi): document the errata abi changes feat(fvp): enable errata management interface fix(cpus): workaround
Merge changes from topic "srm/Errata_ABI_El3" into integration
* changes: docs(errata_abi): document the errata abi changes feat(fvp): enable errata management interface fix(cpus): workaround platforms non-arm interconnect refactor(errata_abi): factor in non-arm interconnect feat(errata_abi): errata management firmware interface
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| 1b491eea | 13-Feb-2023 |
Elyes Haouas <ehaouas@noos.fr> |
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6
fix(tree): correct some typos
found using codespell (https://github.com/codespell-project/codespell).
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
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| 6503ff29 | 27-Jan-2023 |
Andre Przywara <andre.przywara@arm.com> |
refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED
At the moment we only support FEAT_RAS to be either unconditionally compiled in, or to be not supported at all.
Add support for runtime det
refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED
At the moment we only support FEAT_RAS to be either unconditionally compiled in, or to be not supported at all.
Add support for runtime detection (FEAT_RAS=2), by splitting is_armv8_2_feat_ras_present() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access RAS related registers.
Also move the context saving code from assembly to C, and use the new is_feat_ras_supported() function to guard its execution.
Change the FVP platform default to the now supported dynamic option (=2), so the right decision can be made by the code at runtime.
Change-Id: I30498f72fd80b136850856244687400456a03d0e Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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| 9202d519 | 13-Feb-2023 |
Manish Pandey <manish.pandey2@arm.com> |
refactor(ras): replace RAS_EXTENSION with FEAT_RAS
The current usage of RAS_EXTENSION in TF-A codebase is to cater for two things in TF-A : 1. Pull in necessary framework and platform hooks for Firm
refactor(ras): replace RAS_EXTENSION with FEAT_RAS
The current usage of RAS_EXTENSION in TF-A codebase is to cater for two things in TF-A : 1. Pull in necessary framework and platform hooks for Firmware first handling(FFH) of RAS errors. 2. Manage the FEAT_RAS extension when switching the worlds.
FFH means that all the EAs from NS are trapped in EL3 first and signaled to NS world later after the first handling is done in firmware. There is an alternate way of handling RAS errors viz Kernel First handling(KFH). Tying FEAT_RAS to RAS_EXTENSION build flag was not correct as the feature is needed for proper handling KFH in as well.
This patch breaks down the RAS_EXTENSION flag into a flag to denote the CPU architecture `ENABLE_FEAT_RAS` which is used in context management during world switch and another flag `RAS_FFH_SUPPORT` to pull in required framework and platform hooks for FFH.
Proper support for KFH will be added in future patches.
BREAKING CHANGE: The previous RAS_EXTENSION is now deprecated. The equivalent functionality can be achieved by the following 2 options: - ENABLE_FEAT_RAS - RAS_FFH_SUPPORT
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I1abb9ab6622b8f1b15712b12f17612804d48a6ec
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| 3e292319 | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "assert_boolean_set" into integration
* changes: build!: check boolean flags are not empty fix(build): add a default value for INVERTED_MEMMAP fix(a5ds): add default v
Merge changes from topic "assert_boolean_set" into integration
* changes: build!: check boolean flags are not empty fix(build): add a default value for INVERTED_MEMMAP fix(a5ds): add default value for ARM_DISABLE_TRUSTED_WDOG fix(st-crypto): move flag control into source code fix(stm32mp1): always define PKA algos flags fix(stm32mp1): remove boolean check on PLAT_TBBR_IMG_DEF
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| 865aff30 | 09-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(fvp): introduce PLATFORM_TEST_RAS_FFH config" into integration |
| 6fbe11cd | 04-May-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
refactor(tc): define PLATFORM_TESTS for scale
For scalability when we add more tests in the future, add PLATFORM_TESTS macro when specific test flags, i.e. PLATFORM_TEST_NV_COUNTERS, are defined.
C
refactor(tc): define PLATFORM_TESTS for scale
For scalability when we add more tests in the future, add PLATFORM_TESTS macro when specific test flags, i.e. PLATFORM_TEST_NV_COUNTERS, are defined.
Change-Id: Icb875a171dde673fca9fcf66624ac55383e7b641 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| d3bed158 | 14-Mar-2023 |
Sona Mathew <SonaRebecca.Mathew@arm.com> |
feat(fvp): enable errata management interface
Errata ABI feature specific build flag, flag to enable CPUs in the cpu list, flags to test non-arm interconnect based errata flags when enabled from a p
feat(fvp): enable errata management interface
Errata ABI feature specific build flag, flag to enable CPUs in the cpu list, flags to test non-arm interconnect based errata flags when enabled from a platform level. Added to the FVP platform makefile to test the errata abi feature implementation.
The flags to enable CPUs in the cpu list will be removed once synchronized with the errata framework.
Change-Id: I30877a22ac1348906a6ddfb26f9e8839912d3572 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
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| 5602ce1d | 24-Apr-2023 |
Manish Pandey <manish.pandey2@arm.com> |
feat(fvp): introduce PLATFORM_TEST_RAS_FFH config
While doing RAS related tests there were few patches related with fault injection and handling were applied through CI hooks. These patches were inv
feat(fvp): introduce PLATFORM_TEST_RAS_FFH config
While doing RAS related tests there were few patches related with fault injection and handling were applied through CI hooks. These patches were invisible as they were applied and removed after the build is done.
This patch introduces build macro PLATFORM_TEST_RAS_FFH and moves the patches applied through CI under this.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Iddba52f3ebf21f575a473e50c607a944391156b9
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| 28b2d86c | 22-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
feat(tc): allow secure watchdog timer to trigger periodically
This patch does the following: 1. Configures SBSA secure watchdog timer as Group0 interrupt for TC platform while keeping it as G
feat(tc): allow secure watchdog timer to trigger periodically
This patch does the following: 1. Configures SBSA secure watchdog timer as Group0 interrupt for TC platform while keeping it as Group1 secure interrupt for other CSS based SoCs. 2. Programs the watchdog timer to trigger periodically 3. Provides a Group0 interrupt handler for TC platform port to deactivate the EL3 interrupt due to expiry of secure watchdog timer and refresh it explicitly.
Change-Id: I3847d6eb7347c6ea0e527b97b096119ca1e6701b Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| c194aa0c | 04-May-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(fvp): define ns memory in the SPMC manifest" into integration |
| 03971a07 | 04-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(tc): only suspend booting after running plat tests" into integration |
| 9b266556 | 03-May-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
fix(tc): only suspend booting after running plat tests
1. When doing a normal boot, tc_bl31_common_platform_setup() should simply configure the platform and return.
2. When we are running the platf
fix(tc): only suspend booting after running plat tests
1. When doing a normal boot, tc_bl31_common_platform_setup() should simply configure the platform and return.
2. When we are running the platform tests instead, tc_bl31_common_platform_setup() should run the tests then suspend booting (and thus never return).
We were incorreclty suspending the boot in case 1 as well. Put that code under a preprocessor condition (PLATFORM_TEST_NV_COUNTERS or PLATFORM_TEST_TFM_TESTSUITE) to fix this.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I7d20800e3bcd85261e2cdad325586d184e12a3e3
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| 17f9732d | 03-May-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mp/group0_support" into integration
* changes: docs(spm): support for handling Group0 interrupts feat(spmd): introduce platform handler for Group0 interrupt feat(spmd
Merge changes from topic "mp/group0_support" into integration
* changes: docs(spm): support for handling Group0 interrupts feat(spmd): introduce platform handler for Group0 interrupt feat(spmd): add support for FFA_EL3_INTR_HANDLE_32 ABI feat(spmd): register handler for group0 interrupt from NWd
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| 5bdafc40 | 21-Feb-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(n1sdp): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, turn
fix(n1sdp): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, turning off both cores in a cluster would cause a hang when powering back on either core. This change introduced issues on other platforms with a different GIC implementation, and was reverted in commit 60719e4e0965aead49d927f12bf2a37bd2629012.
This commit uses the previous fix in platform-specific implementations of power domain off/suspend functions.
Signed-off-by: Werner Lewis <werner.lewis@arm.com> Change-Id: I52c463646c494fe931ff4ce47afb940a56978fcd
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| 02a5bcb0 | 15-Feb-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, tu
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor power off to resolve an error on N1SDP/Morello. Prior to this fix, turning off both cores in a cluster would cause a hang when powering back on either core. This change introduced issues on other platforms with a different GIC implementation, and was reverted in commit 60719e4e0965aead49d927f12bf2a37bd2629012.
This commit uses the previous fix in platform-specific implementations of power domain off/suspend functions.
Signed-off-by: Werner Lewis <werner.lewis@arm.com> Change-Id: Ib7689a5e08ada3862406fa92019a6f0bcfb48d79
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| 115ab638 | 02-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
fix(a5ds): add default value for ARM_DISABLE_TRUSTED_WDOG
With introduction of check on boolean flags, it should be ensured that each boolean flag has default value provided by platform.
Signed-off
fix(a5ds): add default value for ARM_DISABLE_TRUSTED_WDOG
With introduction of check on boolean flags, it should be ensured that each boolean flag has default value provided by platform.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ia92c3dded842e14099b4a7667569605d7066a8f9
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| 7f28179a | 16-Mar-2023 |
J-Alves <joao.alves@arm.com> |
feat(fvp): define ns memory in the SPMC manifest
The SPMC (Hafnium) looks for secure and non-secure ranges in its manifest. Those relate with ranges that can be used by SPs in their FF-A manifests.
feat(fvp): define ns memory in the SPMC manifest
The SPMC (Hafnium) looks for secure and non-secure ranges in its manifest. Those relate with ranges that can be used by SPs in their FF-A manifests. The NS memory that is not used by SPs will be assigned to the NWd, for it to share memory with SPs as needed. Thus, this limits the memory the NWd can share with SPs, to prevent NWD VMs from sharing memory that belongs to other critical components.
Signed-off-by: J-Alves <joao.alves@arm.com> Change-Id: Iad03eb138a57068fbb18c53141bdf6bf9c171b28
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| fda676d3 | 02-May-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "build: deprecate Arm rde1edge" into integration |
| 607388df | 02-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(sme): disable SME for SPD=spmd" into integration |
| 49246670 | 02-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes Ia1142b31,I424f1cde into integration
* changes: fix(tc): enable the execution of both platform tests fix(tc): update the name of mbedtls config header |
| c89fdb4a | 02-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(fiptool): move plat_fiptool.mk to tools" into integration |
| f0b64e50 | 02-Mar-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
feat(spmd): introduce platform handler for Group0 interrupt
This patch introduces a handler for FVP platform to triage Group0 secure interrupts. Currently, it is empty but serves as a placeholder fo
feat(spmd): introduce platform handler for Group0 interrupt
This patch introduces a handler for FVP platform to triage Group0 secure interrupts. Currently, it is empty but serves as a placeholder for future Group0 interrupt sources.
Moreover, this patch also provides a dummy implementation of the above mentioned platform hook for QEMU, corstone100, n1sdp and hikey960 ports.
Change-Id: I01d3451408f47ac313b0af74046cce89f89b85bb Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 48a65ec3 | 28-Apr-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(fvp): introduce PLATFORM_TEST_EA_FFH config" into integration |