History log of /rk3399_ARM-atf/plat/arm/board/fvp/fvp_err.c (Results 1 – 22 of 22)
Revision Date Author Comments
# 9cc776f1 27-Aug-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge "fix(drtm): remove plat_system_reset()" into integration


# 30bbc4fa 14-Aug-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that i

fix(drtm): remove plat_system_reset()

The name plat_system_reset() has been in use for some time by a mediatek
platform (in plat/mediatek/mt8173/plat_pm.c). However, DRTM added a
global hook, that is only implemented on FVP, that conflicts with it.
This sometimes results in failed builds.

DRTM remediation ends with a platform reset. However, there is currently
an error message printed that this is not supported. In this case, the
correct thing to do is to panic and as such this hook is not needed.

Further, the correct sequence to reset the system is different and is
only fully implemented by psci_system_reset(). This is a portable
implementation supported by a wide variety of platform.

So remove plat_system_reset(). Once DRTM remediation properly supports
resetting, the psci_system_reset() function should be used to achieve
reset correctly and portably.

Change-Id: Ia4e150c51aeec613838464fbb0e1d0542f19ccab
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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# 7042fa6d 06-Oct-2022 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "mb/drtm-preparatory-patches" into integration

* changes:
docs(drtm): steps to run DRTM implementation
docs(drtm): add platform APIs for DRTM
feat(drtm): flush dcache

Merge changes from topic "mb/drtm-preparatory-patches" into integration

* changes:
docs(drtm): steps to run DRTM implementation
docs(drtm): add platform APIs for DRTM
feat(drtm): flush dcache before DLME launch
feat(drtm): invalidate icache before DLME launch
feat(drtm): ensure that passed region lies within Non-Secure region of DRAM
feat(fvp): add plat API to validate that passed region is non-secure
feat(drtm): ensure that no SDEI event registered during dynamic launch
feat(drtm): prepare EL state during dynamic launch
feat(drtm): prepare DLME data for DLME launch
feat(drtm): take DRTM components measurements before DLME launch
feat(drtm): add a few DRTM DMA protection APIs
feat(drtm): add remediation driver support in DRTM
feat(fvp): add plat API to set and get the DRTM error
feat(drtm): add Event Log driver support for DRTM
feat(drtm): check drtm arguments during dynamic launch
feat(drtm): introduce drtm dynamic launch function
refactor(measured-boot): split out a few Event Log driver functions
feat(drtm): retrieve DRTM features
feat(drtm): add platform functions for DRTM
feat(sdei): add a function to return total number of events registered
feat(drtm): add PCR entries for DRTM
feat(drtm): update drtm setup function
refactor(crypto): change CRYPTO_SUPPORT flag to numeric
feat(mbedtls): update mbedTLS driver for DRTM support
feat(fvp): add crypto support in BL31
feat(crypto): update crypto module for DRTM support
build(changelog): add new scope for mbedTLS and Crypto module
feat(drtm): add standard DRTM service
build(changelog): add new scope for DRTM service
feat(fvp): increase MAX_XLAT_TABLES entries for DRTM support
feat(fvp): increase BL31's stack size for DRTM support
feat(fvp): add platform hooks for DRTM DMA protection

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# 586f60cc 12-Jul-2022 Manish V Badarkhe <Manish.Badarkhe@arm.com>

feat(fvp): add plat API to set and get the DRTM error

Added a platform function to set and get DRTM error.
Also, added a platform function to reset the system.

Signed-off-by: Manish V Badarkhe <Man

feat(fvp): add plat API to set and get the DRTM error

Added a platform function to set and get DRTM error.
Also, added a platform function to reset the system.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I471f2387f8c78b21a06af063a6fa02cda3646557

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# 3d88d113 20-Jul-2021 Manish Pandey <manish.pandey2@arm.com>

Merge changes from topic "fwu-refactor" into integration

* changes:
refactor(plat/arm): use mmio* functions to read/write NVFLAGS registers
refactor(plat/arm): mark the flash region as read-only

Merge changes from topic "fwu-refactor" into integration

* changes:
refactor(plat/arm): use mmio* functions to read/write NVFLAGS registers
refactor(plat/arm): mark the flash region as read-only
refactor(plat/arm): update NV flags on image load/authentication failure

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# 59ea3648 23-May-2021 Manish V Badarkhe <Manish.Badarkhe@arm.com>

refactor(plat/arm): update NV flags on image load/authentication failure

Erasing the FIP TOC header present in a flash is replaced by updating NV
flags with an error code on image load/authenticatio

refactor(plat/arm): update NV flags on image load/authentication failure

Erasing the FIP TOC header present in a flash is replaced by updating NV
flags with an error code on image load/authentication failure.
BL1 component uses these NV flags to detect whether a firmware update is
needed or not.
These NV flags get cleared once the firmware update gets completed.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6232a0db07c89b2373b7b9d28acd37df6203d914

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# 800b8849 28-Apr-2021 Mark Dykes <mark.dykes@arm.com>

Merge "refactor(plat/arm): replace FIP base and size macro with a generic name" into integration


# 49e9ac28 22-Apr-2021 Manish V Badarkhe <Manish.Badarkhe@arm.com>

refactor(plat/arm): replace FIP base and size macro with a generic name

Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a
generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IM

refactor(plat/arm): replace FIP base and size macro with a generic name

Replaced PLAT_ARM_FIP_BASE and PLAT_ARM_FIP_MAX_SIZE macro with a
generic name PLAT_ARM_FLASH_IMAGE_BASE and PLAT_ARM_FLASH_IMAGE_MAX_SIZE
so that these macros can be reused in the subsequent GPT based support
changes.

Change-Id: I88fdbd53e1966578af4f1e8e9d5fef42c27b1173
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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# dfe577a8 14-Oct-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Don't return error information from console_flush" into integration


# 831b0e98 05-Aug-2020 Jimmy Brisson <jimmy.brisson@arm.com>

Don't return error information from console_flush

And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return typ

Don't return error information from console_flush

And from crash_console_flush.

We ignore the error information return by console_flush in _every_
place where we call it, and casting the return type to void does not
work around the MISRA violation that this causes. Instead, we collect
the error information from the driver (to avoid changing that API), and
don't return it to the caller.

Change-Id: I1e35afe01764d5c8f0efd04f8949d333ffb688c1
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

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# 235c8174 04-Feb-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "Coverity: remove unnecessary header file includes" into integration


# e6937287 03-Feb-2020 Zelalem <zelalem.aweke@arm.com>

Coverity: remove unnecessary header file includes

This patch removes unnecessary header file includes
discovered by Coverity HFA option.

Change-Id: I2827c37c1c24866c87db0e206e681900545925d4
Signed-

Coverity: remove unnecessary header file includes

This patch removes unnecessary header file includes
discovered by Coverity HFA option.

Change-Id: I2827c37c1c24866c87db0e206e681900545925d4
Signed-off-by: Zelalem <zelalem.aweke@arm.com>

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# 4dc74ca3 23-Jul-2019 Soby Mathew <soby.mathew@arm.com>

Merge "arm: Shorten the Firmware Update (FWU) process" into integration


# 37b70031 04-Jul-2019 Ambroise Vincent <ambroise.vincent@arm.com>

arm: Shorten the Firmware Update (FWU) process

The watchdog is configured with a default value of 256 seconds in order
to implement the Trusted Board Boot Requirements.

For the FVP and Juno platfor

arm: Shorten the Firmware Update (FWU) process

The watchdog is configured with a default value of 256 seconds in order
to implement the Trusted Board Boot Requirements.

For the FVP and Juno platforms, the FWU process relies on a watchdog
reset. In order to automate the test of FWU, the length of this process
needs to be as short as possible. Instead of waiting for those 4 minutes
to have a reset by the watchdog, tell it to reset immediately.

There are no side effects as the value of the watchdog's load register
resets to 0xFFFFFFFF.

Tested on Juno.

Change-Id: Ib1aea80ceddc18ff1e0813a5b98dd141ba8a3ff2
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

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# 73a96051 28-Feb-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1282 from robertovargas-arm/misra-changes

Misra changes


# 1af540ef 12-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix MISRA rule 8.4 Part 1

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 al

Fix MISRA rule 8.4 Part 1

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all

Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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# f132b4a0 04-May-2017 davidcunado-arm <david.cunado@arm.com>

Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers


# 82cb2c1a 03-May-2017 dp-arm <dimitris.papastamos@arm.com>

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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# 079e522d 19-Aug-2016 danh-arm <dan.handley@arm.com>

Merge pull request #687 from sandrine-bailleux-arm/sb/panic-handler

Add WFI in platform's unexpected error handlers


# 8c9e1af0 18-Aug-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Add WFI in platform's unexpected error handlers

This patch adds a WFI instruction in the default implementations of
plat_error_handler() and plat_panic_handler(). This potentially reduces
power cons

Add WFI in platform's unexpected error handlers

This patch adds a WFI instruction in the default implementations of
plat_error_handler() and plat_panic_handler(). This potentially reduces
power consumption by allowing the hardware to enter a low-power state.
The same change has been made to the FVP and Juno platform ports.

Change-Id: Ia4e6e1e5bf1ed42efbba7d0ebbad7be8d5f9f173

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# 38d8fddf 02-Dec-2015 danh-arm <dan.handley@arm.com>

Merge pull request #444 from jcastillo-arm/jc/tbb_wdog

Jc/tbb wdog


# 7b4c1405 06-Oct-2015 Juan Castillo <juan.castillo@arm.com>

TBB: add Trusted Watchdog support on ARM platforms

This patch adds watchdog support on ARM platforms (FVP and Juno).
A secure instance of SP805 is used as Trusted Watchdog. It is
entirely managed in

TBB: add Trusted Watchdog support on ARM platforms

This patch adds watchdog support on ARM platforms (FVP and Juno).
A secure instance of SP805 is used as Trusted Watchdog. It is
entirely managed in BL1, being enabled in the early platform setup
hook and disabled in the exit hook. By default, the watchdog is
enabled in every build (even when TBB is disabled).

A new ARM platform specific build option `ARM_DISABLE_TRUSTED_WDOG`
has been introduced to allow the user to disable the watchdog at
build time. This feature may be used for testing or debugging
purposes.

Specific error handlers for Juno and FVP are also provided in this
patch. These handlers will be called after an image load or
authentication error. On FVP, the Table of Contents (ToC) in the FIP
is erased. On Juno, the corresponding error code is stored in the
V2M Non-Volatile flags register. In both cases, the CPU spins until
a watchdog reset is generated after 256 seconds (as specified in
the TBBR document).

Change-Id: I9ca11dcb0fe15af5dbc5407ab3cf05add962f4b4

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