| #
10d33abe |
| 14-Jan-2026 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "at/ras-rdaspen" into integration
* changes:
feat(rdaspen/ras): dump the CPER buffer contents
feat(rdaspen/ras): generate CPER at TF-A EL3
feat(rdaspen/ras): add DT bu
Merge changes from topic "at/ras-rdaspen" into integration
* changes:
feat(rdaspen/ras): dump the CPER buffer contents
feat(rdaspen/ras): generate CPER at TF-A EL3
feat(rdaspen/ras): add DT buffer and IRQ setup
feat(rdaspen): event handler for CPU RAS
feat(rdaspen/ras): intr RAS handling for PC CPU
show more ...
|
| #
cbad38ff |
| 07-Nov-2025 |
Sanjana Virupakshagouda <sanjana.virupakshagouda@arm.com> |
feat(rdaspen/ras): generate CPER at TF-A EL3
Generate CPER buffer at TF-A EL3, that emits the error data,
when there is a CPU RAS error in the system.
The CPER record consists of:
ESB Header
ESB Da
feat(rdaspen/ras): generate CPER at TF-A EL3
Generate CPER buffer at TF-A EL3, that emits the error data,
when there is a CPU RAS error in the system.
The CPER record consists of:
ESB Header
ESB Data Entry
CPER CPU Error Section
- Arm Processor Error Record
- Arm Processor Error Information
- Arm Processor Context Information
Change-Id: I7e9703a69edec15cbb6f0522333700bb8d7007bf
Signed-off-by: Sanjana Virupakshagouda <sanjana.virupakshagouda@arm.com>
Signed-off-by: Ahmed Tiba <ahmed.tiba@arm.com>
show more ...
|