Merge "feat(versal2): add PM support for 1-cluster 4-core topology" into integration

feat(versal2): add PM support for 1-cluster 4-core topology

Add PM node IDs for Core 2 and Core 3 of Cluster 0.

Add new pm_proc structure to support the 1 Cluster 4 cores topology and
select the pm

feat(versal2): add PM support for 1-cluster 4-core topology

Add PM node IDs for Core 2 and Core 3 of Cluster 0.

Add new pm_proc structure to support the 1 Cluster 4 cores topology and
select the pm_proc table dynamically based on topology.

Update APU_PCIL core index calculation logic to support 1-cluster
4-core topology.

Change-Id: I14ba4a2caa9a9872adaa44a78dc288ec49cbcc89
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

show more ...

fix(versal2): correct NS entry point check for reserved regions

The NS entrypoint validation logic incorrectly compared the entrypoint
address against size rather than the end of the reserved region

fix(versal2): correct NS entry point check for reserved regions

The NS entrypoint validation logic incorrectly compared the entrypoint
address against size rather than the end of the reserved region
(base + size). As a result, entrypoints within reserved‑memory regions
could incorrectly pass validation.
Correct the check to treat each reserved region as [base, base + size).

Fixes: 27e722210602 ("feat(versal2): validate non-secure entry addr")
Change-Id: Ifc19f31295c6fb034862e3bca78e1d8659eb86a2
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(amd): update topology before GIC init

On platforms where the core and cluster count is determined at
runtime from the device tree, the GIC redistributor mapping uses
stale compile-time defaults.

fix(amd): update topology before GIC init

On platforms where the core and cluster count is determined at
runtime from the device tree, the GIC redistributor mapping uses
stale compile-time defaults. This causes secondary CPUs whose
affinity exceeds the default topology to be skipped during GIC
initialization, resulting in an assert during CPU bring-up.

Ensure the device tree topology is resolved before the GIC is
initialized so the redistributor mapping reflects the actual
hardware configuration.

Fixes: 8daa7377b7dc ("feat(versal2): add dynamic fetching of core and cluster")

Change-Id: Ide17dd0b3a26816c8361bc1fb4fed19aebcc6813
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

feat(versal2): add static topology via build arg

Introduce VERSAL2_VARIANT build argument to select the CPU topology
at compile time. When VERSAL2_VARIANT=14 is passed:

- PLATFORM_CLUSTER_COUNT is

feat(versal2): add static topology via build arg

Introduce VERSAL2_VARIANT build argument to select the CPU topology
at compile time. When VERSAL2_VARIANT=14 is passed:

- PLATFORM_CLUSTER_COUNT is set to 1 and
PLATFORM_CORE_COUNT_PER_CLUSTER to 4, yielding 4 total cores.

The default configuration uses VERSAL2_VARIANT=42, providing
4 clusters with 2 cores each (8 total cores).

Platform cluster and core limits and the static power-domain tree
layout follow the selected variant.

The versal2-2vm3654 variant has a single CPU cluster of four cores
(VERSAL2_VARIANT=14) instead of the general-purpose Versal Gen 2
topology (4 clusters × 2 cores, VERSAL2_VARIANT=42).

Change-Id: Ib22c87ae58cc87da726d36a0f8370ecd97598bf5
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(versal2): use 64-bit macros for BL31 checks

BL31_BASE and BL31_LIMIT are used for BL31 address range
validation during platform checks.

Using U() produces 32-bit constants, which can truncate
u

fix(versal2): use 64-bit macros for BL31 checks

BL31_BASE and BL31_LIMIT are used for BL31 address range
validation during platform checks.

Using U() produces 32-bit constants, which can truncate
upper address bits and cause incorrect comparisons on
AArch64 systems.

Update these macros to use UL() so the constants are
64-bit and type-consistent.

Change-Id: Idae2d3e3874258a60b859b65e09c2d03693c086a
Signed-off-by: Sai Varun Venkatapuram <saivarun.venkatapuram@amd.com>

show more ...

Merge changes from topic "amd_feat_dyn_core_clust" into integration

* changes:
feat(versal2): update plat psci based on dynamic core and cluster
feat(versal2): add dynamic fetching of core and c

Merge changes from topic "amd_feat_dyn_core_clust" into integration

* changes:
feat(versal2): update plat psci based on dynamic core and cluster
feat(versal2): add dynamic fetching of core and cluster
refactor(xilinx): promote map/unmap helpers to public scope
feat(versal2): use runtime core/cluster variables for dyn topology

show more ...

feat(versal2): update plat psci based on dynamic core and cluster

Update the psci logic under TFA_NO_PM which checks for core and
cluster counts based on the dynamic core and cluster information
ret

feat(versal2): update plat psci based on dynamic core and cluster

Update the psci logic under TFA_NO_PM which checks for core and
cluster counts based on the dynamic core and cluster information
retrieved from the DT blob.

Change-Id: If32f4a114099eca5d8961ff89e481257ebca49c1
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

feat(versal2): add dynamic fetching of core and cluster

Add dynamic fetching of core and cluster information from device tree
blob and on failure fallback to default configurations of Versal Gen 2.

feat(versal2): add dynamic fetching of core and cluster

Add dynamic fetching of core and cluster information from device tree
blob and on failure fallback to default configurations of Versal Gen 2.

Change-Id: Ide03f8a412f7155c0c85627be4fd1e0064863fc9
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

feat(versal2): use runtime core/cluster variables for dyn topology

Replace static CORE/CLUSTER macros with variables exposed from
platform topology. These variables are updated at runtime
thereby en

feat(versal2): use runtime core/cluster variables for dyn topology

Replace static CORE/CLUSTER macros with variables exposed from
platform topology. These variables are updated at runtime
thereby enabling dynamic topology configuration.

Change-Id: Ia98e32c78c48f5e24ec152409e663f173feaccc0
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

fix(versal2): add prototype for external linkage

MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or function
with
external linkage is defined.
Added visible proto

fix(versal2): add prototype for external linkage

MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or function
with
external linkage is defined.
Added visible prototype to fix this violation.

Change-Id: Ia4b2b8077944b90c36d848e83faadbf6d2f8a0e9
Signed-off-by: Sai Varun Venkatapuram <saivarun.venkatapuram@amd.com>

show more ...

Merge changes from topic "amd_custompkg_infra" into integration

* changes:
fix(versal2): remove SCMI drivers in NO PM configuration
feat(amd): custom package linker infra
chore(versal2): make

Merge changes from topic "amd_custompkg_infra" into integration

* changes:
fix(versal2): remove SCMI drivers in NO PM configuration
feat(amd): custom package linker infra
chore(versal2): make TFA_NO_PM configurable with default value
feat(amd): support multiple custom packages

show more ...

fix(versal2): remove SCMI drivers in NO PM configuration

Remove SCMI message driver and related sources when TFA_NO_PM=1,
as SCMI functionality is only relevant when power management is
enabled.

Wh

fix(versal2): remove SCMI drivers in NO PM configuration

Remove SCMI message driver and related sources when TFA_NO_PM=1,
as SCMI functionality is only relevant when power management is
enabled.

When TF-A is built without PM support (TFA_NO_PM=1), the platform
only needs basic PSCI support. The SCMI server implementation and
scmi-msg drivers are unnecessary in this configuration and should
be excluded from the build.

Changes:
- Remove SCMI-related source files from BL31_SOURCES in NO PM path
- Delete scmi.c implementation (clock, reset, power domain stubs)
- Keep only minimal plat_psci.c for basic PSCI functionality

This reduces binary size and removes unused code paths when SCMI
services are not required.

Change-Id: I33397b1fa32e309728042b1bdba07aa6ad02c844
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

feat(amd): custom package linker infra

Add linker script consolidation framework for custom packages
integrated with TF-A.

- Implement two-stage preprocessing for custom linker scripts
- Auto-disco

feat(amd): custom package linker infra

Add linker script consolidation framework for custom packages
integrated with TF-A.

- Implement two-stage preprocessing for custom linker scripts
- Auto-discover custom_pkg.ld.S files in package directories
- Create linker script template (plat.ld.S.tpl) for consolidation
- Support normalized absolute path resolution for multiple packages
- Generate final plat.ld.S by preprocessing template with custom scripts

The framework automatically discovers and preprocesses custom package
linker scripts, expanding package-specific macros before inclusion in
the final consolidated linker script. This enables multiple packages
to define custom memory regions and sections without conflicts.

Change-Id: Ie21e807f96507a655275443df5f33b18915965f8
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

chore(versal2): make TFA_NO_PM configurable with default value

Change TFA_NO_PM from a hardcoded assignment (TFA_NO_PM := 0) to
a conditional assignment using the ?= operator (TFA_NO_PM ?= 0).
Move

chore(versal2): make TFA_NO_PM configurable with default value

Change TFA_NO_PM from a hardcoded assignment (TFA_NO_PM := 0) to
a conditional assignment using the ?= operator (TFA_NO_PM ?= 0).
Move the definition after custom package integration to ensure
proper initialization order.

This allows users to override TFA_NO_PM at build time while
maintaining a sensible default value (disabled PM by default).
The reordering ensures TFA_NO_PM is defined after CUSTOM_PKG_PATH
processing, preventing unintended overwrites by build-time
customizations.

Change-Id: I864f3a53f7b0614bef9dbdab727ed1c82156363a
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

feat(amd): support multiple custom packages

Add support for including multiple custom packages to be built and
linked with TF-A for AMD platforms. This allows flexible integration
of multiple custom

feat(amd): support multiple custom packages

Add support for including multiple custom packages to be built and
linked with TF-A for AMD platforms. This allows flexible integration
of multiple custom service implementations.

- Introduce custom_pkg.mk for custom package integration
- Create custom_svc_stub.c with default stub implementations
- Refactor platform.mk to conditionally include custom packages
- Support multiple package paths via space/semicolon-separated
CUSTOM_PKG_PATH

The framework handles discovery and inclusion of custom_pkg.mk files
from each package directory, providing flexibility for platform-specific
customizations without modifying TF-A core code.

Change-Id: I254373f81744328a3e7d5fcf482d137c7108444f
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

fix(versal2): update IRQ_MAX for SDIO interrupts

IRQ_MAX is defined as 200U but the irq_to_pm_node_idx()
function handles IRQ numbers up to 220 for SDIO devices
(IRQ 218 for SDIO_0 and IRQ 220 for S

fix(versal2): update IRQ_MAX for SDIO interrupts

IRQ_MAX is defined as 200U but the irq_to_pm_node_idx()
function handles IRQ numbers up to 220 for SDIO devices
(IRQ 218 for SDIO_0 and IRQ 220 for SDIO_1).

This mismatch causes a runtime assertion failure when SDIO
interrupts are processed, preventing proper SDIO device power
management.

Update IRQ_MAX to 220U to accommodate the highest IRQ number
actually handled by the platform.

Change-Id: Icc78e4325750c69d8b50423675f256314993ecec
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix violations for unreferenced functions

Fix below violations:
- Violation:
- The function that is declared should be referenced or used.
- Fix:
- Remove unused function declarati

fix(versal2): fix violations for unreferenced functions

Fix below violations:
- Violation:
- The function that is declared should be referenced or used.
- Fix:
- Remove unused function declarations.

Change-Id: I0e5fb40c84b3daa34ca516eb53a8b2a29c05b7e6
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 8.13 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.13:
- A pointer should point to a const-qualified type whenever
possible.
- Fix:
-

fix(versal2): fix misra rule 8.13 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.13:
- A pointer should point to a const-qualified type whenever
possible.
- Fix:
- Add const qualifier to pointer parameters.

Change-Id: I4572e507156de74b5f9c16a59de054ac8e497562
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 5.9 violation

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.5.9:
- Identifiers that define objects or functions with internal
linkage should be uniq

fix(versal2): fix misra rule 5.9 violation

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.5.9:
- Identifiers that define objects or functions with internal
linkage should be unique.
- Fix:
- Rename static variable to make identifier unique.

Change-Id: I2d4ab586f291e3a4f8b7a7deeca193649891724e
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 2.7 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.7:
- There should be no unused parameters in functions.
- Fix:
- Type cast unused param

fix(versal2): fix misra rule 2.7 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.7:
- There should be no unused parameters in functions.
- Fix:
- Type cast unused parameters to void.

Change-Id: Ic28f8904647cc592dae3a2db0d6b614746e48876
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 4.6 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 Dir 4.6:
- Typedefs that indicate size and signedness should be used in
place of the basi

fix(versal2): fix misra rule 4.6 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 Dir 4.6:
- Typedefs that indicate size and signedness should be used in
place of the basic numerical types.
- Fix:
- Replace basic numerical types with specific-width typedefs.

Change-Id: Id096937ac9998a7a2e980e0e08680db5a19f87aa
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 5.7 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.5.7:
- A tag name shall be a unique identifier.
- Fix:
- Rename local variables to avoid

fix(versal2): fix misra rule 5.7 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.5.7:
- A tag name shall be a unique identifier.
- Fix:
- Rename local variables to avoid conflict with type names.

Change-Id: Iac8df3166dcc69ceccaaddae2134f9c8a043b3b6
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 10.4 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic
conversions are per

fix(versal2): fix misra rule 10.4 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
- Fix:
- Make operands of the same essential type category.

Change-Id: Idf3489dee8f45a5a27bda4e4392b84510352623e
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...

fix(versal2): fix misra rule 10.3 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narrower

fix(versal2): fix misra rule 10.3 violations

Fix below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narrower essential type or of a different essential type
category.
- Fix:
- Add explicit type casts to prevent implicit narrowing
conversions.

Change-Id: I756137cf9a403f1f6395c1d7c2d9bb70a3f6ff80
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

show more ...