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8078b5c5 |
| 30-Mar-2021 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "allwinner_h616" into integration
* changes: allwinner: H616: Add reserved-memory node to DT allwinner: Add Allwinner H616 SoC support allwinner: Add H616 SoC ID all
Merge changes from topic "allwinner_h616" into integration
* changes: allwinner: H616: Add reserved-memory node to DT allwinner: Add Allwinner H616 SoC support allwinner: Add H616 SoC ID allwinner: Express memmap more dynamically allwinner: Move sunxi_cpu_power_off_self() into platforms allwinner: Move SEPARATE_NOBITS_REGION to platforms doc: allwinner: Reorder sections, document memory mapping
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| #
26123ca3 |
| 28-Nov-2020 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Add Allwinner H616 SoC support
The new Allwinner H616 SoC lacks the management controller and the secure SRAM A2, so we need to tweak the memory map quite substantially: We run BL31 in DR
allwinner: Add Allwinner H616 SoC support
The new Allwinner H616 SoC lacks the management controller and the secure SRAM A2, so we need to tweak the memory map quite substantially: We run BL31 in DRAM. Since the DRAM starts at 1GB, we cannot use our compressed virtual address space (max 256MB) anymore, so we revert to the full 32bit VA space and use a flat mapping throughout all of it.
The missing controller also means we need to always use the native PSCI ops, using the CPUIDLE hardware, as SCPI and suspend depend on the ARISC.
Change-Id: I77169b452cb7f5dc2ef734f3fc6e5d931749141d Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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