History log of /rk3399_ARM-atf/plat/allwinner/common/sunxi_security.c (Results 1 – 13 of 13)
Revision Date Author Comments
# fe7366ab 22-Dec-2020 André Przywara <andre.przywara@arm.com>

Merge changes I3703868b,Ie77476db into integration

* changes:
allwinner: Add SPC security setup for H6
allwinner: Add R_PRCM security setup for H6


# 49d98cd5 14-Dec-2020 Samuel Holland <samuel@sholland.org>

allwinner: Add SPC security setup for H6

The H6 has a "secure port controller" similar to the A64/H5, but with
more ports and a different register layout. Split the platform-specific
parts out into

allwinner: Add SPC security setup for H6

The H6 has a "secure port controller" similar to the A64/H5, but with
more ports and a different register layout. Split the platform-specific
parts out into a header, and add the missing MMIO base address.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I3703868bc595459ecf9568b9d1605cb1be014bf5

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# 978a8240 14-Dec-2020 Samuel Holland <samuel@sholland.org>

allwinner: Add R_PRCM security setup for H6

H6 has a reorganized R_PRCM compared to A64/H5, with the security switch
at a different offset. Until now, we did not notice, because the switch
has no ef

allwinner: Add R_PRCM security setup for H6

H6 has a reorganized R_PRCM compared to A64/H5, with the security switch
at a different offset. Until now, we did not notice, because the switch
has no effect unless the secure mode e-fuse is blown.

Since we are adding more platform-specific CCU registers, move them to
their own header, and out of the memory map (where they do not belong).

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ie77476db0515080954eaa2e32bf6c3de657cda86

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# a021b2dd 29-Jun-2020 André Przywara <andre.przywara@arm.com>

Merge "allwinner: Disable NS access to PRCM power control registers" into integration


# 506ffe50 29-Dec-2019 Samuel Holland <samuel@sholland.org>

allwinner: Disable NS access to PRCM power control registers

The non-secure world has no business accessing the CPU power switches in
the PRCM; those are handled by TF-A or the SCP. Only allow acces

allwinner: Disable NS access to PRCM power control registers

The non-secure world has no business accessing the CPU power switches in
the PRCM; those are handled by TF-A or the SCP. Only allow access to the
clock control part of the PRCM.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I657b97f4ea8a0073448ad3343fbc66ba168ed89e

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# 9a207532 04-Jan-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase


# 09d40e0e 14-Dec-2018 Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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# 318c2f97 31-Oct-2018 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1646 from Andre-ARM/allwinner/pmic-v2

Allwinner/pmic v2


# 4ec1a239 14-Oct-2018 Andre Przywara <andre.przywara@arm.com>

allwinner: Export sunxi_private.h

So far we have a sunxi_private.h header file in the common code directory.
This holds the prototypes of various functions we share in *common*
code. However we will

allwinner: Export sunxi_private.h

So far we have a sunxi_private.h header file in the common code directory.
This holds the prototypes of various functions we share in *common*
code. However we will need some of those in the platform specific code
parts as well, and want to introduce new functions shared across the
whole platform port.

So move the sunxi_private.h file into the common/include directory, so
that it becomes visible to all parts of the platform code.
Fix up the existing #includes and add missing ones, also add the
sunxi_read_soc_id() prototype here.

This will be used in follow up patches.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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# c2f27ced 03-Jul-2018 Dimitris Papastamos <dimitris.papastamos@arm.com>

Merge pull request #1458 from Andre-ARM/allwinner/fixes

allwinner: various smaller fixes


# 88aa5c43 21-Jun-2018 Andre Przywara <andre.przywara@arm.com>

allwinner: security: Fix SPC guard

The "#ifdef SUNXI_SPC_BASE" guard was meant to allow the build on SoCs
without a Secure Peripherals Controller, so that we skip that part of
the security setup. Bu

allwinner: security: Fix SPC guard

The "#ifdef SUNXI_SPC_BASE" guard was meant to allow the build on SoCs
without a Secure Peripherals Controller, so that we skip that part of
the security setup. But in the current position this will trigger a
warning about an unused variable.

Simply move the guard one line up to cover the variable as well.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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# ac0197d9 19-Jun-2018 Dimitris Papastamos <dimitris.papastamos@arm.com>

Merge pull request #1400 from Andre-ARM/allwinner/v1

Allwinner platform support


# acb8b3ca 01-Jun-2018 Andre Przywara <andre.przywara@arm.com>

allwinner: Add security setup

Some peripherals are TrustZone aware, so they need to be configured to
be accessible from non-secure world, as we don't need any of them being
exclusive to the secure w

allwinner: Add security setup

Some peripherals are TrustZone aware, so they need to be configured to
be accessible from non-secure world, as we don't need any of them being
exclusive to the secure world.
This affects some clocks, DMA channels and the Secure Peripheral
Controller (SPC). The latter controls access to most devices, but is not
active unless booting with the secure boot fuse burnt.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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