fix(allwinner): avoid crash when running without DTB

For determining the PMIC type and the bus its connected to, we use the
DTB that is appended to the U-Boot binary, by looking for it in DRAM.
And

fix(allwinner): avoid crash when running without DTB

For determining the PMIC type and the bus its connected to, we use the
DTB that is appended to the U-Boot binary, by looking for it in DRAM.
And while we bail out correctly if we don't find it there, we later try
to use the DTB pointer - without checking.

Add a check in sunxi_pmic_setup(), to only proceed if we have found a
DTB before, and exit early otherwise.

This fixes more experimental setups, where TF-A is run without U-Boot.

Change-Id: I9a7677be057a84fe6bee093d098be758970eec81
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

build(allwinner): disable unneeded CVE workarounds and MPAM

There are a number of workarounds for CVEs related to sidechannel
attacks on some CPU cores, most of them listed here:
https://developer.a

build(allwinner): disable unneeded CVE workarounds and MPAM

There are a number of workarounds for CVEs related to sidechannel
attacks on some CPU cores, most of them listed here:
https://developer.arm.com/documentation/110280/latest/
Also there are two other CVEs:
https://developer.arm.com/documentation/110324/latest/
https://developer.arm.com/documentation/110326/latest/

As these page reveals, those workaround do not apply to the Cortex-A53
(or A55) cores, so we can safely disable them in the Allwinner build
recipes, since they only use those two cores so far.

Also disable FEAT_MPAM, which is one of the only three later features
that are enabled default, but are not enabled in Cortex-A53 or A55
cores. Use the opportunity to group those options together and improve
the comment.

This decreases the code size by a few hundred bytes.

Change-Id: Ibc52a4fc9b8f5d9b2b28a2ce13d3ab99b63e9640
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

refactor(platforms): remove usage of psci_power_down_wfi

The callers in PSCI will now call wfi() after calling the
pwr_domain_pwr_down() platform hook (previously they were mutually
exclusive). As s

refactor(platforms): remove usage of psci_power_down_wfi

The callers in PSCI will now call wfi() after calling the
pwr_domain_pwr_down() platform hook (previously they were mutually
exclusive). As such, there is no need for platforms to do this
themselves. In fact, it is strongly advisable for platforms not to do
this themselves so that the PSCI can apply any relevant errata
mitigations.

Change-Id: Ic9702edef7503996be24d984e29dfcc13bc3fcba
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

fix(allwinner): fix variable may be used uninitialized error

When building with LTO, the compiler observes that i2c_read() can return
without writing val, declaring the variable may be used unnitial

fix(allwinner): fix variable may be used uninitialized error

When building with LTO, the compiler observes that i2c_read() can return
without writing val, declaring the variable may be used unnitialized.
However, there is a sufficient error check that will prevent an actual
use. So calm the compiler by giving a safe default.

Change-Id: I558618467ae324a6b5b495ec9d204935135f226d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

refactor: panic after calling psci_power_down_wfi()

This function doesn't return and its callers that don't return either
rely on this. Drop the dead attribute and add a panic() after it to make
thi

refactor: panic after calling psci_power_down_wfi()

This function doesn't return and its callers that don't return either
rely on this. Drop the dead attribute and add a panic() after it to make
this expectation explicit. Calling `wfi` in the powerdown sequence is
terminal so even if the function was made to return, there would be no
functional change.

This is useful for a following patch that makes psci_power_down_wfi()
return.

Change-Id: I62ca1ee058b1eaeb046966c795081e01bf45a2eb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

fix(allwinner): enable dtb modifications for CPU idle states to the rich OS

Commit e2b18771fc2a0528dda18dbdaac08dd8530df25a ("feat(allwinner):
provide CPU idle states to the rich OS") added function

fix(allwinner): enable dtb modifications for CPU idle states to the rich OS

Commit e2b18771fc2a0528dda18dbdaac08dd8530df25a ("feat(allwinner):
provide CPU idle states to the rich OS") added functionality to amend
dtb, when SCPI as the PSCI backend is available. But this
functionality is disabled by default even for platforms, that support
it, like A64. As a result rich OS don't get information about
available CPU idle states.

Due to size constraints of A64 platform DEBUG=1 can be built with
dtb amend functionality only with LTO enabled. So ENABLE_LTO is
enabled by default for this platform.

```
aarch64-linux-gnu-ld.bfd: address 0x500dd of build/sun50i_a64/debug/bl31/bl31.elf section `.data' is not within region `RAM'
aarch64-linux-gnu-ld.bfd: BL31 image has exceeded its limit.
aarch64-linux-gnu-ld.bfd: region `RAM' overflowed by 224 bytes
```

To build with ENABLE_LTO=0 and DEBUG=1 it's required SUNXI_AMEND_DTB=0
to explicitly disable dtb amend functionality.

sun50i_r329 SUNXI_AMEND_DTB=1 DEBUG=1 build fails with 'region `RAM'
overflowed by 120 bytes'. To avoid unnecessary RAM consumption on
other resource-constraints platforms (like sun50i_r329)
SUNXI_AMEND_DTB is enabled only on sun50i_a64. Otherwise
On other platforms sunxi_idle_states are empty.

Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Change-Id: I81fcf31b5bd2bd02a9f3361a6a519632f087445d

show more ...

fix(allwinner): dtb: check for correct error condition

In sunxi_soc_fdt_fixup(), we check for the value of "ret" again, after
calling fdt_node_offset_by_phandle(), even though the error value of
tha

fix(allwinner): dtb: check for correct error condition

In sunxi_soc_fdt_fixup(), we check for the value of "ret" again, after
calling fdt_node_offset_by_phandle(), even though the error value of
that lands in "node".

Check for "node" being non-negative instead, to properly detect any
errors here.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: I57c1406388dbe11d343038da173019519e18af3e

show more ...

feat(allwinner): adjust H616 L2 cache size in DTB

The Allwinner H616 and its siblings come in different die revisions,
some have 256 KB of L2 cache, some have 1 MB. This prevents a single
static cac

feat(allwinner): adjust H616 L2 cache size in DTB

The Allwinner H616 and its siblings come in different die revisions,
some have 256 KB of L2 cache, some have 1 MB. This prevents a single
static cache description in the devicetree.

Use the cache size ID register (CCSIDR_EL1) to query the topology of the
L2 cache, and adjust the cache-sets and cache-size properties in the L2
cache DT node accordingly.

The ARM ARM does not promise (anymore) that the cache size can be derived
*architecturally* from this register, but the reading is definitely
correct for the Arm Cortex-A53 core used.

Change-Id: Id7dc324d783b8319fe5df6164be2f941d4cac82d
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

feat(allwinner): h616: add support for AXP717 PMIC

On at least one new device we see an Allwinner H700 SoC paired with the
X-Powers AXP717 PMIC. In contrast to the small AXP313, this is a quite
comp

feat(allwinner): h616: add support for AXP717 PMIC

On at least one new device we see an Allwinner H700 SoC paired with the
X-Powers AXP717 PMIC. In contrast to the small AXP313, this is a quite
complete PMIC, with many voltage rails, battery and USB-C charging
support. It supports both RSB and I2C control options.

Add the compatible string to the list of checked devices. The AXP717
apparently does not feature a version ID register, but we read 0xff from
that address 0x3, so use this as an indication of its presence, since
this value differs from what we read from the other PMICs.
The register offset and bit position for the power off functionality is
again different, but easy to put into our switch/case.

Setting up regulators in TF-A is now somewhat obsolete, since U-Boot
does a much better job in this now, and can figure out which regulators
are actually needed. So we don't add the regulator setup code, and just
use the PMIC for the power-off functionality.

Change-Id: Ie6b4c91517014adcc79d9a3459c75545fa3a63e6
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

feat(allwinner): h616: add support for AXP313 PMIC

Many newer boards with the H616 and its sibling H618 are now paired
with the X-Powers AXP313 PMIC. This is a simpler PMIC, with only a few
voltage

feat(allwinner): h616: add support for AXP313 PMIC

Many newer boards with the H616 and its sibling H618 are now paired
with the X-Powers AXP313 PMIC. This is a simpler PMIC, with only a few
voltage rails and no extra functionality except the power key support.
In contrast to the AXP305 it can only be controlled via I2C.

Add a check to look for the AXP313 compatible string in the devicetree,
and set the PMIC type and I2C address accordingly, if one is found.
With only very few voltage rails available, all of them are mostly in
use and are thus enabled at reset already, so we can skip the regulator
setup entirely.

Change-Id: I01962854109e43793b4f56553c1ca9e1f752e30d
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

feat(allwinner): h616: add I2C PMIC support

The X-Powers AXP305 PMIC can be controlled via both I2C or RSB (an
Allwinner specific bus similar to I2C), but we chose to use only RSB,
because that's ea

feat(allwinner): h616: add I2C PMIC support

The X-Powers AXP305 PMIC can be controlled via both I2C or RSB (an
Allwinner specific bus similar to I2C), but we chose to use only RSB,
because that's easier to program and also used by Linux. The AXP313a
PMIC however supports only I2C, so we need to support both buses, and
need to decide which to use at runtime.

Prepare the PMIC code to add (back) I2C support. We initially used I2C
on the H6/AXP805 combination, but replaced that later with RSB. So this
patch is bringing some of that older code back.

The decision whether to use I2C or RSB is made by the devicetree, since
on some boards even RSB capable PMICs are controlled via I2C, since they
share the bus with only I2C capable devices, for instance RTCs.

At the moment this will still use RSB to drive the AXP305, but the
(dynamic) I2C code will be used shortly to support the AXP313.

This increases the code size by one 4K page, but with 80K out of the
reserved 256K we are still very far away from our limit.

Change-Id: I65c1e7df93dbd2dcd171b3fc486533a2948cc75b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

refactor(allwinner): h616: prepare for more than one PMIC model

Most devices based on Allwinner SoCs come with a certain fixed
combination of Power Management ICs (PMICs) and SoC, for instance the
A

refactor(allwinner): h616: prepare for more than one PMIC model

Most devices based on Allwinner SoCs come with a certain fixed
combination of Power Management ICs (PMICs) and SoC, for instance the
A64 with the AXP803, or the H6 with the AXP805. This allowed us to
include the respective PMIC support code into each build target at build
time.

Similarly on H616 devices we initially saw only the AXP305, but for a
while now the simpler (and cheaper) AXP313a is a popular companion to
the H616 on many new boards. On at least one new device the AXP717 is
used as well.
With some rudimentary AXP version check in place we at least detected
the case of an unsupported SoC, but threw an error message, and lost
support for powering off the device.

Refactor the existing PMIC code to be able to support more than one
PMIC model, detected at runtime. For this we use a variable for the RSB
runtime address instead of hardcoding the address used on the AXP305,
and read the hardware bus address from the devicetree.
Also we look up the used PMIC in the devicetree, and set the PMIC model
accordingly. To be on the safe side, we also confirm the real PMIC used
by checking its version register and comparing that with the expected
value. Finally the register offset and value to power off the PMIC is
moved direclty into the platform code, as those values differ between
the different PMICs.

This is just refactoring and better error report, we still only support
the AXP305 on RSB at the moment.

Change-Id: I00b26ce4d30bb570ee1cd4979d0cdc9d6c020729
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...

fix(allwinner): remove unneeded header inclusion

Nothing in sunxi_bl31_setup.c uses any functionality provided by the
fdt_wrappers file, so remove its inclusion from the header list.

Change-Id: I47

fix(allwinner): remove unneeded header inclusion

Nothing in sunxi_bl31_setup.c uses any functionality provided by the
fdt_wrappers file, so remove its inclusion from the header list.

Change-Id: I47031a58add2f85e757e75d8578f4e8e21ef65ea
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

show more ...