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85658c56 |
| 19-Apr-2024 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32" into integration
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e6f8fc74 |
| 12-Mar-2024 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32
While comments introduced with the original commit claim that pmuv3_disable_el3()/pmuv3_init_el3() are compatible with PMUv2 and PMUv1, this
fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32
While comments introduced with the original commit claim that pmuv3_disable_el3()/pmuv3_init_el3() are compatible with PMUv2 and PMUv1, this is not true in practice: The function accesses the Secure Debug Control Register (SDCR), which only available to ARMv8 CPUs.
ARMv8 CPUs executing in AArch32 mode would thus be able to disable their PMUv3, while ARMv7 CPUs would hang trying to access the SDCR.
Fix this by only doing PMUv3 handling when we know a PMUv3 to be available. This resolves boot hanging on all STM32MP15 platforms that use SP_min as BL32 instead of OP-TEE.
Change-Id: I40f7611cf46b89a30243cc55bf55a8d9c9de93c8 Fixes: c73686a11cea ("feat(pmu): introduce pmuv3 lib/extensions folder") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| #
a2d43637 |
| 17-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/context_refactor" into integration
* changes: refactor(amu): separate the EL2 and EL3 enablement code refactor(cpufeat): separate the EL2 and EL3 enablement code
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| #
60d330dc |
| 16-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be called at el3_exit, which is the only place with enough context to
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be called at el3_exit, which is the only place with enough context to make the decision of what needs to be set. Decouple them to allow them to be called from elsewhere.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I147764c42771e7d4100699ec8fae98dac0a505c0
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26d67076 |
| 29-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/context_refactor" into integration
* changes: refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init feat(pmu): introduce pmuv3 lib/extensions f
Merge changes from topic "bk/context_refactor" into integration
* changes: refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init feat(pmu): introduce pmuv3 lib/extensions folder fix(pmu): make MDCR_EL3.MTPME=1 out of reset refactor(cm): introduce a real manage_extensions_nonsecure()
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| #
83a4dae1 |
| 16-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init
The FEAT_MTPMU feature disable runs very early after reset. This means, it needs to be written in assembly, since the C ru
refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init
The FEAT_MTPMU feature disable runs very early after reset. This means, it needs to be written in assembly, since the C runtime has not been initialised yet.
However, there is no need for it to be initialised so soon. The PMU state is only relevant after TF-A has relinquished control. The code to do this is also very verbose and difficult to read. Delaying the initialisation allows for it to happen with the rest of the PMU. Align with FEAT_STATE in the process.
BREAKING CHANGE: This patch explicitly breaks the EL2 entry path. It is currently unsupported.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I2aa659d026fbdb75152469f6d19812ece3488c6f
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| #
c73686a1 |
| 15-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
feat(pmu): introduce pmuv3 lib/extensions folder
The enablement code for the PMU is scattered and difficult to track down. Factor out the feature into its own lib/extensions folder and consolidate t
feat(pmu): introduce pmuv3 lib/extensions folder
The enablement code for the PMU is scattered and difficult to track down. Factor out the feature into its own lib/extensions folder and consolidate the implementation. Treat it is as an architecturally mandatory feature as it is currently.
Additionally, do some cleanup on AArch64. Setting overflow bits in PMCR_EL0 is irrelevant for firmware so don't do it. Then delay the PMU initialisation until the context management stage which simplifies the early environment assembly. One side effect is that the PMU might count before this happens so reset all counters to 0 to prevent any leakage.
Finally, add an enable to manage_extensions_realm() as realm world uses the pmu. This introduces the HPMN fixup to realm world.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Ie13a8625820ecc5fbfa467dc6ca18025bf6a9cd3
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