| c5a3ebbd | 15-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
refactor(context-mgmt): move FEAT_HCX save/restore into C
At the moment we save and restore the HCRX_EL2 register in assembly, and just depend on the build time flags. To allow runtime checking, and
refactor(context-mgmt): move FEAT_HCX save/restore into C
At the moment we save and restore the HCRX_EL2 register in assembly, and just depend on the build time flags. To allow runtime checking, and to avoid too much code in assembly, move that over to C, and use the new combined build/runtime feature check.
This also allows to drop the assert, since this should now be covered by the different FEAT_STATE_x options.
Change-Id: I3e20b9ba17121d423cd08edc20bbf4e7ae7c0178 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| bb7b85a3 | 10-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
refactor(context-mgmt): move FEAT_FGT save/restore code into C
At the moment we do the EL2 context save/restore sequence in assembly, where it is just guarded by #ifdef statement for the build time
refactor(context-mgmt): move FEAT_FGT save/restore code into C
At the moment we do the EL2 context save/restore sequence in assembly, where it is just guarded by #ifdef statement for the build time flags. This does not cover the FEAT_STATE_CHECK case, where we need to check for the runtime availability of a feature.
To simplify this extension, and to avoid writing too much code in assembly, move that sequence into C: it is called from C context anyways.
This protects the C code with the new version of the is_xxx_present() check, which combines both build time and runtime check, as necessary, and allows the compiler to optimise the calls aways, if we don't need them.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I7c91bec60efcc00a43429dc0381f7e1c203be780
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| bacfff8b | 09-Jan-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(libc): properly define SCHAR_MIN" into integration |
| 06c01b08 | 06-Jan-2023 |
Yann Gautier <yann.gautier@st.com> |
fix(libc): properly define SCHAR_MIN
SCHAR_MIN definition should use SCHAR_MAX, and not itself.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: If8c1751a381dac50fe3ec5fdf19d6a4918470b58 |
| 40e740dc | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(fconf): make struct fconf_populator static
In FCONF_REGISTER_POPULATOR macro, add static for the fconf_populator struct. This avoids this kind of sparse warning: plat/st/common/stm32mp_fconf_io.
fix(fconf): make struct fconf_populator static
In FCONF_REGISTER_POPULATOR macro, add static for the fconf_populator struct. This avoids this kind of sparse warning: plat/st/common/stm32mp_fconf_io.c:181:1: warning: symbol 'stm32mp_io__populator' was not declared. Should it be static?
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Icaa7da3079e82497e112585150f6348ef2ebf5e6
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| 8406db14 | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix: add parenthesis for tests in MIN, MAX and CLAMP macros
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit
Signed-off-by: Yann
fix: add parenthesis for tests in MIN, MAX and CLAMP macros
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I62083c43b3f633504cac3497efe2e984924c63b2
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| 825641d6 | 07-Dec-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes Ida9abfd5,Iec447d97 into integration
* changes: build: enable adding MbedTLS files for platform feat(lib/psa): add read_measurement API |
| d3d2a5a4 | 28-Nov-2022 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge "fix(cpus): workaround for Cortex-X3 erratum 2615812" into integration |
| 85a14bc0 | 04-Nov-2022 |
David Vincze <david.vincze@arm.com> |
fix(rss): remove null-terminator from RSS metadata
Remove the null-terminator of the string-like data items from the RSS measurement's metadata. The 'version' and 'sw_type' items have an associated
fix(rss): remove null-terminator from RSS metadata
Remove the null-terminator of the string-like data items from the RSS measurement's metadata. The 'version' and 'sw_type' items have an associated length value which should not include a null-terminator when storing the measurement.
Change-Id: Ia91ace2fff8b6f75686dd2e1862475268300bbdb Signed-off-by: David Vincze <david.vincze@arm.com>
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| 6d0525aa | 24-Oct-2022 |
Mate Toth-Pal <mate.toth-pal@arm.com> |
feat(lib/psa): add read_measurement API
This API is added for testing purposes. It makes possible to write test cases that read measurements back after extending them, and compare them to expected r
feat(lib/psa): add read_measurement API
This API is added for testing purposes. It makes possible to write test cases that read measurements back after extending them, and compare them to expected results.
Change-Id: Iec447d972fdd54a56ab933a065476e0f4d35a6fc Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
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| c7e698cf | 11-Nov-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(cpus): workaround for Cortex-X3 erratum 2615812
Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions r0p0, r1p0, and r1p1, and is still open. The workaround is to disable the u
fix(cpus): workaround for Cortex-X3 erratum 2615812
Cortex-X3 erratum 2615812 is a Cat B erratum that applies to revisions r0p0, r1p0, and r1p1, and is still open. The workaround is to disable the use of the Full Retention power mode in the core (setting WFI_RET_CTRL and WFE_RET_CTRL in CORTEX_X3_IMP_CPUPWRCTLR_EL1 to 0b000).
SDEN can be found here: https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: I5ad66df3e18fc85a6b23f6662239494ee001d82f Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 0fe7b9f2 | 11-Oct-2022 |
Olivier Deprez <olivier.deprez@arm.com> |
feat: pass SMCCCv1.3 SVE hint bit to dispatchers
SMCCCv1.3 introduces the SVE hint bit added to the SMC FID (bit 16) denoting that the world issuing an SMC doesn't expect the callee to preserve the
feat: pass SMCCCv1.3 SVE hint bit to dispatchers
SMCCCv1.3 introduces the SVE hint bit added to the SMC FID (bit 16) denoting that the world issuing an SMC doesn't expect the callee to preserve the SVE state (FFR, predicates, Zn vector bits greater than 127). Update the generic SMC handler to copy the SVE hint bit state to SMC flags and mask out the bit by default for the services called by the standard dispatcher. It is permitted by the SMCCC standard to ignore the bit as long as the SVE state is preserved. In any case a callee must preserve the NEON state (FPCR/FPSR, Vn 128b vectors) whichever the SVE hint bit state.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I2b163ed83dc311b8f81f96b23c942829ae9fa1b5
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| 9900d4eb | 28-Oct-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "db/deps" into integration
* changes: feat(compiler-rt): update compiler-rt source files fix(deps): add missing aeabi_memcpy.S feat(zlib): update zlib source files d
Merge changes from topic "db/deps" into integration
* changes: feat(compiler-rt): update compiler-rt source files fix(deps): add missing aeabi_memcpy.S feat(zlib): update zlib source files docs(changelog): add zlib and compiler-rt scope feat(libfdt): upgrade libfdt source files docs(prerequisites): upgrade to Mbed TLS 2.28.1
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| 888eafa0 | 03-Oct-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(cpus): workaround for Cortex-A710 erratum 2291219
Cortex-A710 erratum 2291219 is a Cat B erratum that applies to revisions r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set CP
fix(cpus): workaround for Cortex-A710 erratum 2291219
Cortex-A710 erratum 2291219 is a Cat B erratum that applies to revisions r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set CPUACTLR2_EL1[36] to 1 before the power down sequence that sets CORE_PWRDN_EN. This allows the cpu to retry the power down and prevents the deadlock. TF-A never clears this bit even if it wakes up from the wfi in the sequence since it is not expected to do anything but retry to power down after and the bit is cleared on reset.
SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I7d3a97dfac0c433c0be386c1f3d2f2e895a3f691
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| 79544126 | 03-Oct-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(cpus): workaround for Cortex-X3 erratum 2313909
Cortex-X3 erratum 2313909 is a Cat B erratum that applies to revisions r0p0 and r1p0, and is fixed in r1p1. The workaround is to set CPUACTLR2_EL1
fix(cpus): workaround for Cortex-X3 erratum 2313909
Cortex-X3 erratum 2313909 is a Cat B erratum that applies to revisions r0p0 and r1p0, and is fixed in r1p1. The workaround is to set CPUACTLR2_EL1[36] to 1 before the power down sequence that sets CORE_PWRDN_EN. This allows the cpu to retry the power down and prevents the deadlock. TF-A never clears this bit even if it wakes up from the wfi in the sequence since it is not expected to do anything but retry to power down after and the bit is cleared on reset.
SDEN can be found here: https://developer.arm.com/documentation/SDEN2055130/latest
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I5935b4bcd1e6712477c0d6eab2acc96d7964a35d
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| 43438ad1 | 03-Oct-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(cpus): workaround for Neoverse-N2 erratum 2326639
Neoverse-N2 erratum 2326639 is a Cat B erratum that applies to revision r0p0 and is fixed in r0p1. The workaround is to set CPUACTLR2_EL1[36] to
fix(cpus): workaround for Neoverse-N2 erratum 2326639
Neoverse-N2 erratum 2326639 is a Cat B erratum that applies to revision r0p0 and is fixed in r0p1. The workaround is to set CPUACTLR2_EL1[36] to 1 before the power down sequence that sets CORE_PWRDN_EN. This allows the cpu to retry the power down and prevents the deadlock. TF-A never clears this bit even if it wakes up from the wfi in the sequence since it is not expected to do anything but retry to power down after and the bit is cleared on reset.
SDEN can be found here: https://developer.arm.com/documentation/SDEN1982442/latest/
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I9a325c5b9b498798e5efd5c79a4a6d5bed97c619
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| cf58b2d4 | 25-Oct-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
chore: rename Makalu ELP to Cortex-X3
The Cortex-X3 cpu port was developed before its public release when it was known as Makalu ELP. Now that it's released we can use the official product name.
Si
chore: rename Makalu ELP to Cortex-X3
The Cortex-X3 cpu port was developed before its public release when it was known as Makalu ELP. Now that it's released we can use the official product name.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Iebb90cf2f77330ed848a3d61c5f6928942189c5a
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| 8a6a9560 | 21-Oct-2022 |
Daniel Boulby <daniel.boulby@arm.com> |
feat(compiler-rt): update compiler-rt source files
Update the compiler-rt source files to the tip of the llvm-project [1]. To do this some new header files were pulled in from the freebsd-src repo [
feat(compiler-rt): update compiler-rt source files
Update the compiler-rt source files to the tip of the llvm-project [1]. To do this some new header files were pulled in from the freebsd-src repo [2].
[1] https://github.com/llvm/llvm-project/commit/fae258e [2] https://github.com/freebsd/freebsd-src/commit/243a0eda
Change-Id: I1a012b1fe04e127d35e208923877c98c5d999d00 Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| 94b2f94b | 23-Sep-2022 |
Daniel Boulby <daniel.boulby@arm.com> |
feat(libfdt): upgrade libfdt source files
Update the libfdt source files to the upstream commit e37c256 [1].
[1] https://github.com/dgibson/dtc/commit/e37c256
Change-Id: I00e29b467ff6f8c094f682452
feat(libfdt): upgrade libfdt source files
Update the libfdt source files to the upstream commit e37c256 [1].
[1] https://github.com/dgibson/dtc/commit/e37c256
Change-Id: I00e29b467ff6f8c094f68245232a7cedeaa14aef Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| afb5d069 | 21-Sep-2022 |
Akram Ahmad <Akram.Ahmad@arm.com> |
fix(cpus): workaround for Cortex-A510 erratum 2666669
Cortex-A510 erratum 2666669 applies to revisions r1p1 and lower, and is fixed in r1p2. The errata is mitigated by setting IMP_CPUACTLR_EL1[38] t
fix(cpus): workaround for Cortex-A510 erratum 2666669
Cortex-A510 erratum 2666669 applies to revisions r1p1 and lower, and is fixed in r1p2. The errata is mitigated by setting IMP_CPUACTLR_EL1[38] to 1.
SDEN documentation: https://developer.arm.com/documentation/SDEN1873351/latest https://developer.arm.com/documentation/SDEN1873361/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com> Change-Id: Ief27e4a155e43e75f05f2710d0c7bd5da2dec43f
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| 8e75b542 | 11-Oct-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "feat(cpu): add library support for Hunter ELP" into integration |
| a2506c31 | 11-Oct-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "revert(cpus): "Revert workaround for A77 erratum 1800714"" into integration |
| 08e2fdbd | 27-Sep-2022 |
Boyan Karatotev <boyan.karatotev@arm.com> |
revert(cpus): "Revert workaround for A77 erratum 1800714"
Reinstate the workaround introduced in commit 9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN could not be found and
revert(cpus): "Revert workaround for A77 erratum 1800714"
Reinstate the workaround introduced in commit 9bbc03a6e0608a949d66d9da6db12a455b452bfb. The cited change to the SDEN could not be found and there are no known problems with the workaround.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: Iec9938f173e7565024aca798f224df339de90806
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| 8c87becb | 03-Oct-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
feat(cpu): add library support for Hunter ELP
Add basic CPU library code to support the Hunter ELP CPU in TF-A. Hunter-ELP adds v9.2 architecture support and is derived from Makalu-ELP. As such, the
feat(cpu): add library support for Hunter ELP
Add basic CPU library code to support the Hunter ELP CPU in TF-A. Hunter-ELP adds v9.2 architecture support and is derived from Makalu-ELP. As such, the library code is adapted from the Makalu-ELP support library.
Change-Id: I7e93b9af6b1f0bc4d08c3cf5caf071d2cbdbc89f Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 420deb5a | 01-Sep-2022 |
Tamas Ban <tamas.ban@arm.com> |
feat(psa): remove initial attestation partition API
The attestation key derivation and platform attestation token creation functionality is provided by the Delegated Attestation partition in RSS.
S
feat(psa): remove initial attestation partition API
The attestation key derivation and platform attestation token creation functionality is provided by the Delegated Attestation partition in RSS.
Signed-off-by: Tamas Ban <tamas.ban@arm.com> Change-Id: I2d8c0e6589d11e7c81c698adf75ee2a993e3a0c6
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