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19e4312c |
| 02-Sep-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support" into integration
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| #
c42aefd3 |
| 12-Aug-2025 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support
Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower Exception Levels to access MPAM_PE_BW_CTRL control registers by disabling their traps to
feat(cpufeat): enable FEAT_MPAM_PE_BW_CTRL support
Implement support for FEAT_MPAM_PE_BW_CTRL, allowing lower Exception Levels to access MPAM_PE_BW_CTRL control registers by disabling their traps to EL3.
When INIT_UNUSED_NS_EL2=1, configure MPAMBW2_EL2 in EL3 so that MPAM_PE_BW_CTRL accesses from EL0/EL1 do not trap to EL2.
At this stage, PE-side MPAM bandwidth controls remain disabled in EL3.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I8e359b0eb912cff3bdda109b21727a627cac3a7e
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| #
11f99e8d |
| 21-Dec-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(cm): move MPAM3_EL3 reg to per world context" into integration
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| #
ac4f6aaf |
| 08-Nov-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
refactor(cm): move MPAM3_EL3 reg to per world context
Refactor MPAM3_EL3 to be world-specific, eliminating redundant cross-CPU value duplication and reducing memory footprint.
Signed-off-by: Arvind
refactor(cm): move MPAM3_EL3 reg to per world context
Refactor MPAM3_EL3 to be world-specific, eliminating redundant cross-CPU value duplication and reducing memory footprint.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Iddf020a5462737e01ac35e4f2b2b204a8759fafb
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| #
0e1dc0f2 |
| 25-Oct-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(mpam): refine MPAM initialization and enablement process" into integration
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| #
edebefbc |
| 11-Oct-2023 |
Arvind Ram Prakash <arvind.ramprakash@arm.com> |
fix(mpam): refine MPAM initialization and enablement process
Restricts MPAM to only NS world and enables trap to EL3 for access of MPAM registers from lower ELs of Secure and Realm world.
This patc
fix(mpam): refine MPAM initialization and enablement process
Restricts MPAM to only NS world and enables trap to EL3 for access of MPAM registers from lower ELs of Secure and Realm world.
This patch removes MPAM enablement from global context and adds it to EL3 State context which enables/disables MPAM during world switches. Renamed ENABLE_MPAM_FOR_LOWER_ELS to ENABLE_FEAT_MPAM and removed mpam_init_el3() as RESET behaviour is trapping.
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: I131f9dba5df236a71959b2d425ee11af7f3c38c4
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a2d43637 |
| 17-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "bk/context_refactor" into integration
* changes: refactor(amu): separate the EL2 and EL3 enablement code refactor(cpufeat): separate the EL2 and EL3 enablement code
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| #
60d330dc |
| 16-Feb-2023 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be called at el3_exit, which is the only place with enough context to
refactor(cpufeat): separate the EL2 and EL3 enablement code
Combining the EL2 and EL3 enablement code necessitates that it must be called at el3_exit, which is the only place with enough context to make the decision of what needs to be set. Decouple them to allow them to be called from elsewhere.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I147764c42771e7d4100699ec8fae98dac0a505c0
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82f5b509 |
| 27-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "feat_state_part4" into integration
* changes: refactor(cpufeat): enable FEAT_RNG for FEAT_STATE_CHECKED refactor(cpufeat): align FEAT_SEL2 to new feature handling ref
Merge changes from topic "feat_state_part4" into integration
* changes: refactor(cpufeat): enable FEAT_RNG for FEAT_STATE_CHECKED refactor(cpufeat): align FEAT_SEL2 to new feature handling refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED refactor(cpufeat): enable FEAT_TWED for FEAT_STATE_CHECKED refactor(cpufeat): enable FEAT_CSV2_2 for FEAT_STATE_CHECKED refactor(cpufeat): enable FEAT_ECV for FEAT_STATE_CHECKED refactor(cpufeat): enable FEAT_PAN for FEAT_STATE_CHECKED refactor(cpufeat): align FEAT_SB to new feature handling refactor(cpufeat): use alternative encoding for "SB" barrier refactor(cpufeat): enable SYS_REG_TRACE for FEAT_STATE_CHECKED fix(cpufeat): make stub enable functions "static inline" fix(mpam): feat_detect: support major/minor
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d7f3ed36 |
| 22-Mar-2023 |
Andre Przywara <andre.przywara@arm.com> |
fix(cpufeat): make stub enable functions "static inline"
For builds where we don't have a certain feature enabled, we provide empty stub xxx_enable() functions in a header file. This way we avoid #i
fix(cpufeat): make stub enable functions "static inline"
For builds where we don't have a certain feature enabled, we provide empty stub xxx_enable() functions in a header file. This way we avoid #ifdef's in the code, and can call the enable function unconditionally. When compiling with -O1 or higher, the compiler will even optimise out the whole call, so the symbol will never make it into any object file. When compiling with optimisations turned off, the function stub will survive, and could make it into multiple object files, which would lead to a multiple definitons error.
Avoid this by defining those stub functions as "static inline". The "static" will avoid the multiple definitions problems, the "inline" will avoid a potential compiler warning about unused functions. This patterns is used extensively in the Linux kernel.
Change-Id: Iad07bb946aab372587c83f2423b4983bf3817990 Reported-by: Chris Kay <chris.kay@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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7419b7a7 |
| 20-Mar-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "feat_state_part3" into integration
* changes: refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED feat(l
Merge changes from topic "feat_state_part3" into integration
* changes: refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED feat(libc): add support for fallthrough statement refactor(spe): enable FEAT_SPE for FEAT_STATE_CHECKED refactor(cpufeat): rename ENABLE_SPE_FOR_LOWER_ELS to ENABLE_SPE_FOR_NS fix(spe): drop SPE EL2 context switch code
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| #
9448f2b8 |
| 17-Nov-2022 |
Andre Przywara <andre.przywara@arm.com> |
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
At the moment we only support FEAT_MPAM to be either unconditionally compiled in, or to be not supported at all.
Add support for runtime dete
refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED
At the moment we only support FEAT_MPAM to be either unconditionally compiled in, or to be not supported at all.
Add support for runtime detection (ENABLE_MPAM_FOR_LOWER_ELS=2), by splitting get_mpam_version() into an ID register reading function and a second function to report the support status. That function considers both build time settings and runtime information (if needed), and is used before we access MPAM related registers. Also move the context saving code from assembly to C, and use the new is_feat_mpam_supported() function to guard its execution.
ENABLE_MPAM_FOR_LOWER_ELS defaults to 0, so add a stub enable function to cover builds with compiler optimisations turned off. The unused mpam_enable() function call will normally be optimised away (because it would never be called), but with -O0 the compiler will leave the symbol in the object file.
Change-Id: I531d87cb855a7c43471f861f625b5a6d4bc61313 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
07066378 |
| 13-Jul-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge "refactor(mpam): remove unused function declaration" into integration
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52698a62 |
| 09-Jul-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(mpam): remove unused function declaration
Change-Id: Ia660b6554fe4544effd1810e1aca202f95e3c447 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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2eedba9a |
| 30-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1651 from antonio-nino-diaz-arm/an/rand-misra
Fix some MISRA defects
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40daecc1 |
| 25-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Fix MISRA defects in extension libs
No functional changes.
Change-Id: I2f28f20944f552447ac4e9e755493cd7c0ea1192 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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61e7c054 |
| 22-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1533 from jeenu-arm/mpam
AArch64: Enable MPAM for lower ELs
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5f835918 |
| 31-Jul-2018 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
AArch64: Enable MPAM for lower ELs
Memory Partitioning And Monitoring is an Armv8.4 feature that enables various memory system components and resources to define partitions. Software running at vari
AArch64: Enable MPAM for lower ELs
Memory Partitioning And Monitoring is an Armv8.4 feature that enables various memory system components and resources to define partitions. Software running at various ELs can then assign themselves to the desired partition to control their performance aspects.
With this patch, when ENABLE_MPAM_FOR_LOWER_ELS is set to 1, EL3 allows lower ELs to access their own MPAM registers without trapping to EL3. This patch however doesn't make use of partitioning in EL3; platform initialisation code should configure and use partitions in EL3 if required.
Change-Id: I5a55b6771ccaa0c1cffc05543d2116b60cbbcdcd Co-authored-by: James Morse <james.morse@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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