| 26aab795 | 07-Feb-2024 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(fwu): add a function to obtain an alternate FWU bank to boot
Add a function fwu_get_alternate_boot_bank() to return a valid bank to boot from. This function can be called by a platform to get a
feat(fwu): add a function to obtain an alternate FWU bank to boot
Add a function fwu_get_alternate_boot_bank() to return a valid bank to boot from. This function can be called by a platform to get an alternate bank to try to boot the platform in the unlikely scenario of the active bank being in an invalid state, or if the number of times the platform boots in trial state exceeds a pre-set count.
Change-Id: I4bcd88e68e334c452882255bf028e01b090369d1 Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
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| 56724d09 | 01-Feb-2024 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(fwu): modify the check for getting the FWU bank's state
The version 2 of the FWU metadata structure has a field bank_state in the top level of the structure which can be used to check if a give
feat(fwu): modify the check for getting the FWU bank's state
The version 2 of the FWU metadata structure has a field bank_state in the top level of the structure which can be used to check if a given bank is in the either of Trial State, Accepted State, or in an Invalid State. This is different from the binary states of Valid/Accepted States that the bank could be in, as defined in the earlier version of the specification.
Replace the fwu_is_trial_run_state() API with fwu_get_active_bank_state() to get the state the current active bank is in. The value returned by this API is then used by the caller to take appropriate action.
Change-Id: I764f486840a3713bfe5f8e03d0634bfe09b23590 Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
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| a89d58bb | 01-Feb-2024 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(fwu): migrate FWU metadata structure to version 2
The latest version of the FWU specification [1] has changes to the metadata structure. This is version 2 of the structure.
Primary changes inc
feat(fwu): migrate FWU metadata structure to version 2
The latest version of the FWU specification [1] has changes to the metadata structure. This is version 2 of the structure.
Primary changes include - bank_state field in the top level structure - Total metadata size in the top level structure - Image description structures now optional - Number of banks and images per bank values part of the structure
Make changes to the structure to align with version 2 of the structure defined in the specification. These changes also remove support for version 1 of the metadata structure.
[1] - https://developer.arm.com/documentation/den0118/latest/
Change-Id: I84b4e742e463cae92375dde8b4603b4a581d62d8 Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
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| e106a78e | 01-Feb-2024 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(fwu): update the URL links for the FWU specification
Update the links for accessing the FWU Multi Bank update specification to point to the latest revision of the specification.
Change-Id: I25
feat(fwu): update the URL links for the FWU specification
Update the links for accessing the FWU Multi Bank update specification to point to the latest revision of the specification.
Change-Id: I25f35556a94ca81ca0a7463aebfcbc2d84595e8f Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
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| 13caddef | 26-Feb-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(st-i2c): use fdt_read_uint32_default()" into integration |
| 8d1a04bd | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(css): support multiple SDS regions
Extend the SDS driver to be able to handle multiple SDS regions: - AP-SCP - AP-RSS
Change-Id: Id303840b248c383b3f960227cbf6333d1cc75e65 Signed-off-by:
refactor(css): support multiple SDS regions
Extend the SDS driver to be able to handle multiple SDS regions: - AP-SCP - AP-RSS
Change-Id: Id303840b248c383b3f960227cbf6333d1cc75e65 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| 771a0715 | 08-Feb-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "ADD_DELAY_IN_POLLING_SCMI" into integration
* changes: fix(scmi): induce a delay in monitoring SCMI channel status feat(css): initialise generic timer early in the boot |
| f84f21fa | 02-Feb-2024 |
Yann Gautier <yann.gautier@st.com> |
fix(usb): add missing include
When trying to compile USB stack for STM32MP2, the following warning happens: In file included from plat/st/stm32mp2/stm32mp2_usb_dfu.c:7: include/drivers/usb_device.h:
fix(usb): add missing include
When trying to compile USB stack for STM32MP2, the following warning happens: In file included from plat/st/stm32mp2/stm32mp2_usb_dfu.c:7: include/drivers/usb_device.h:193:9: error: unknown type name 'bool' 193 | bool is_in;
Correct it by adding: #include <stdbool.h>
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: If17e4e269fcdc885e42f5fcad9cfb763829786e4
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| af1ac2d7 | 18-Jan-2024 |
Pranav Madhu <pranav.madhu@arm.com> |
fix(scmi): induce a delay in monitoring SCMI channel status
Reading the SCMI mailbox status in polling mode causes a burst of bus accesses. On certain platforms, this would not be ideal as the share
fix(scmi): induce a delay in monitoring SCMI channel status
Reading the SCMI mailbox status in polling mode causes a burst of bus accesses. On certain platforms, this would not be ideal as the shared bus on the CPU subsystem might cause contentions across all the CPUs. So allow platforms to specify a delay to be introduced while polling.
Change-Id: Ib90ad7b5954854071cfd543f4a27a178dde3d5c6 Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
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| 0d136806 | 29-Jan-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st-bsec3" into integration
* changes: feat(stm32mp2): add BSEC and OTP support feat(st-bsec): add driver for the new IP version BSEC3 |
| d4a770a9 | 23-Jan-2024 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(intel): update nand driver to match GHRD design" into integration |
| ae6542f6 | 22-May-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(st-bsec): add driver for the new IP version BSEC3
This driver is used for the new version of the BSEC peripheral used on STM32MP25.
Change-Id: I38ca0db22d06704769c994c6806ccd80b17dde6e Signed-
feat(st-bsec): add driver for the new IP version BSEC3
This driver is used for the new version of the BSEC peripheral used on STM32MP25.
Change-Id: I38ca0db22d06704769c994c6806ccd80b17dde6e Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| a773f412 | 15-Nov-2023 |
Girisha Dengi <girisha.dengi@intel.com> |
fix(intel): update nand driver to match GHRD design
Update nand driver to match GHRD design, fix row address calculation method and other misc updates.
Signed-off-by: Girisha Dengi <girisha.dengi@i
fix(intel): update nand driver to match GHRD design
Update nand driver to match GHRD design, fix row address calculation method and other misc updates.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com> Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com> Change-Id: I1cb3dda43e767ba243fbe89bfa18818db321c5c2
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| 586701ce | 02-Oct-2019 |
Yann Gautier <yann.gautier@st.com> |
refactor(st-i2c): use fdt_read_uint32_default()
The function stm32_i2c_get_setup_from_fdt() was using fdt_getprop() to to get some i2c node properties, and set a default value if the node was not fo
refactor(st-i2c): use fdt_read_uint32_default()
The function stm32_i2c_get_setup_from_fdt() was using fdt_getprop() to to get some i2c node properties, and set a default value if the node was not found. The function fdt_read_uint32_default() already does this in a simpler way. Remove useless STM32_I2C_SPEED_DEFAULT.
Change-Id: I74c6295bb5765ee7c7e0a9ae020b741f1fe022a6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| c7061045 | 14-Dec-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(st-bsec): improve BSEC driver
In order to ease the introduction of a new BSEC3 driver for STM32MP25, the BSEC2 driver is reworked. Unused functions are removed. The bsec_base global variabl
refactor(st-bsec): improve BSEC driver
In order to ease the introduction of a new BSEC3 driver for STM32MP25, the BSEC2 driver is reworked. Unused functions are removed. The bsec_base global variable is removed in favor of the macro BSEC_BASE. A rework is also done around function checking the state of BSEC.
Change-Id: I1ad76cb67333ab9a8fa1d65db34d74a712bf1190 Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b65dfe40 | 26-Oct-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
chore(auth)!: remove CryptoCell-712/713 support
CryptoCell-712 and CryptoCell-713 drivers have been deprecated since TF-A v2.9 and their removal was announced for TF-A v2.10 release. See [1].
As th
chore(auth)!: remove CryptoCell-712/713 support
CryptoCell-712 and CryptoCell-713 drivers have been deprecated since TF-A v2.9 and their removal was announced for TF-A v2.10 release. See [1].
As the release is approaching, this patch deletes these drivers' code as well as all references to them in the documentation and Arm platforms code (Nuvoton platform is taken care in a subsequent patch). Associated build options (ARM_CRYPTOCELL_INTEG and PLAT_CRYPTOCELL_BASE) have also been removed and thus will have no effect if defined.
This is a breaking change for downstream platforms which use these drivers.
[1] https://trustedfirmware-a.readthedocs.io/en/v2.9/about/release-information.html#removal-of-deprecated-drivers Note that TF-A v3.0 release later got renumbered into v2.10.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: Idabbc9115f6732ac1a0e52b273d3380677a39813
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| f08460dc | 12-Oct-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(partition): add interface to init gpt
Current interface 'partition_init' accepts parameter image_id and returns no value. But the entire partition driver is build only to parse and handle GPT p
feat(partition): add interface to init gpt
Current interface 'partition_init' accepts parameter image_id and returns no value. But the entire partition driver is build only to parse and handle GPT partitions, so add new interface gpt_partition_init which would return failure to platform code if it fails to parse the image.
Change-Id: Iaf574d2ad01a15d0723c1475290c31dc4a078835 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| ad2dd658 | 03-Oct-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(partition): add support to use backup GPT header
Currently we just use primary GPT header which is located in second entry after MBR header, but if this block is corrupted or CRC mismatch occur
feat(partition): add support to use backup GPT header
Currently we just use primary GPT header which is located in second entry after MBR header, but if this block is corrupted or CRC mismatch occurs we could try to use the backup GPT header located at LBAn and GPT entries following this from LBA-33.
Add suitable warning messages before returning any errors to identify the cause of issue.
Change-Id: I0018ae9eafbacb683a18784d2c8bd917c70f50e1 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| fce8a70e | 21-Sep-2023 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(partition): get GPT header location from MBR
GPT header is located in first LBA after MBR entry and mbr header has details of beginning of first entry, so use mbr header entry first_lba dat
refactor(partition): get GPT header location from MBR
GPT header is located in first LBA after MBR entry and mbr header has details of beginning of first entry, so use mbr header entry first_lba data to locate GPT header rather than GPT_HEADER_OFFSET.
GPT header size is available in gpt_header, so use that rather than using DEFAULT_GPT_HEADER_SIZE.
The location of GPT entries is available once we parse gpt_header and is available as partitiona_lba use that to load gpt_entries rather than GPT_ENTRY_OFFSET.
Change-Id: I3c11f8cc9d4b0b1778a37fe342fb845ea4a4eff1 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 557f7d80 | 15-Aug-2023 |
laurenw-arm <lauren.wehrmeister@arm.com> |
feat(auth): ecdsa p384 key support
Use KEY_SIZE 384 to enable ECDSA P384 key support by setting MBEDTLS_ECP_DP_SECP384R1_ENABLED.
Selected by setting KEY_ALG=ecdsa and KEY_SIZE=384.
Change-Id: I38
feat(auth): ecdsa p384 key support
Use KEY_SIZE 384 to enable ECDSA P384 key support by setting MBEDTLS_ECP_DP_SECP384R1_ENABLED.
Selected by setting KEY_ALG=ecdsa and KEY_SIZE=384.
Change-Id: I382f34fc4da98f166a2aada5d16fdf44632b47f5 Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
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| 85bebe18 | 11-Oct-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(console): disable getc() by default
The ability to read a character from the console constitutes an attack vector into TF-A, as it gives attackers a means to inject arbitrary data into TF-A
refactor(console): disable getc() by default
The ability to read a character from the console constitutes an attack vector into TF-A, as it gives attackers a means to inject arbitrary data into TF-A. It is dangerous to keep that feature enabled if not strictly necessary, especially in production firmware builds.
Thus, we need a way to disable this feature. Moreover, when it is disabled, all related code should be eliminated from the firmware binaries, such that no remnant/dead getc() code remains in memory, which could otherwise be used as a gadget as part of a bigger security attack.
This patch disables getc() feature by default. For legitimate getc() use cases [1], it can be explicitly enabled by building TF-A with ENABLE_CONSOLE_GETC=1.
The following changes are introduced when getc() is disabled:
- The multi-console framework no longer provides the console_getc() function.
- If the console driver selected by the platform attempts to register a getc() callback into the multi-console framework then TF-A will now fail to build.
If registered through the assembly function finish_console_register(): - On AArch64, you'll get: Error: undefined symbol CONSOLE_T_GETC used as an immediate value. - On AArch32, you'll get: Error: internal_relocation (type: OFFSET_IMM) not fixed up
If registered through the C function console_register(), this requires populating a struct console with a getc field, which will trigger: error: 'console_t' {aka 'struct console'} has no member named 'getc'
- All console drivers which previously registered a getc() callback have been modified to do so only when ENABLE_CONSOLE_GETC=1.
[1] Example of such use cases would be: - Firmware recovery: retrieving a golden BL2 image over the console in order to repair a broken firmware on a bricked board. - Factory CLI tool: Drive some soak tests through the console.
Discussed on TF-A mailing list here: https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.org/thread/YS7F6RCNTWBTEOBLAXIRTXWIOYINVRW7/
Change-Id: Icb412304cd23dbdd7662df7cf8992267b7975cc5 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Acked-by: Baruch Siach <baruch@tkos.co.il>
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| 4eaaaa19 | 06-Sep-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(mbedtls-psa): initialise mbedtls psa crypto
Initialised Mbedtls PSA cryto during Crypto init using function call 'psa_crypto_init'.
MbedTLS currently requires a Random Number Generator (RNG) o
feat(mbedtls-psa): initialise mbedtls psa crypto
Initialised Mbedtls PSA cryto during Crypto init using function call 'psa_crypto_init'.
MbedTLS currently requires a Random Number Generator (RNG) once PSA Crypto support is enabled. However, TF-A itself doesn't engage in cryptographic operations that demand randomness. Consequently, we simulate the presence of an external TRNG (through the configuration option 'MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) while, in reality, we offer a dummy implementation of mbedtls_psa_external_get_random() that always returns an error.
Change-Id: Ife6d03909c0e6081438d2b2519ef500e5dcdb88f Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 5782b890 | 06-Sep-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(mbedtls-psa): introduce PSA_CRYPTO build option
This is a preparatory patch to provide MbedTLS PSA Crypto API support, with below changes -
1. Added a build macro PSA_CRYPTO to enable the Mbed
feat(mbedtls-psa): introduce PSA_CRYPTO build option
This is a preparatory patch to provide MbedTLS PSA Crypto API support, with below changes -
1. Added a build macro PSA_CRYPTO to enable the MbedTLS PSA Crypto API support in the subsequent patches. 2. Compile necessary PSA crypto files from MbedTLS source code when PSA_CRYPTO=1.
Also, marked PSA_CRYPTO as an experimental feature.
Change-Id: I45188f56c5c98b169b2e21e365150b1825c6c450 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 7ed514e6 | 02-Oct-2023 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_dcc_console" into integration
* changes: chore(dcc): remove unnecessary code in dcc fix(dcc): add dcc console unregister function |
| 0936abe9 | 19-Sep-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
fix(dcc): add dcc console unregister function
Add unregistration function for the JTAG DCC (Debug Communication Channel) console. The unregistration function flushes DCC buffer before unregistering
fix(dcc): add dcc console unregister function
Add unregistration function for the JTAG DCC (Debug Communication Channel) console. The unregistration function flushes DCC buffer before unregistering the dcc console to make sure that no output char is pending.
Since console_flush() flushes chars for all registered consoles on the platform, which is not required in this case, dcc_console_flush() is being called instead.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Change-Id: I6f15a07c6ee947dc0e7aa8fb069227618080e611
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