| #
e69dee51 |
| 03-Dec-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(clk): add get_possible_parents_num callback" into integration
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| #
e9f69b9f |
| 02-Dec-2025 |
Kamlesh Gurudasani <kamlesh@ti.com> |
feat(clk): add get_possible_parents_num callback
This callback will be used to get number of possible parents if
the underlying clock driver supports this option.
Change-Id: I9459c878dd2155ff24b72c
feat(clk): add get_possible_parents_num callback
This callback will be used to get number of possible parents if
the underlying clock driver supports this option.
Change-Id: I9459c878dd2155ff24b72cef6851180e105be432
Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
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|
| #
0567eca0 |
| 20-Jun-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "add_clk_callbacks" into integration
* changes:
feat(clk): add set_rate callback
feat(clk): add set_parent callback
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| #
19f9e2e6 |
| 31-May-2024 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(clk): add set_rate callback
This callback will be used to set a clock's rate if the underlying clock
driver supports this option. The function's last parameter is an output
parameter, storing t
feat(clk): add set_rate callback
This callback will be used to set a clock's rate if the underlying clock
driver supports this option. The function's last parameter is an output
parameter, storing the actual frequency set by the clock driver, as it
may not precisely match the requested rate in some cases.
Change-Id: I6a399bf6f64407d5fbff36407561e4bf18104cf1
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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|
| #
a2c6016f |
| 03-Jun-2024 |
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com> |
feat(clk): add set_parent callback
This callback will be used to set a clock's parent if the underlying
clock driver supports this option.
Change-Id: Ie8a77d17dd3cc867bd520217b481cd188317a9c9
Signe
feat(clk): add set_parent callback
This callback will be used to set a clock's parent if the underlying
clock driver supports this option.
Change-Id: Ie8a77d17dd3cc867bd520217b481cd188317a9c9
Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
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|
| #
0ca4b4b7 |
| 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "clock_framework" into integration
* changes:
feat(st): use newly introduced clock framework
feat(clk): add a minimal clock framework
|
| #
847c6bc8 |
| 13-Oct-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compil
feat(clk): add a minimal clock framework
This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.
Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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