| #
9719e19a |
| 24-Mar-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration
* changes: nxp lx2160a-aqds: new plat based on soc lx2160a NXP lx2160a-rdb: new plat based on SoC lx2160a
Merge changes I500ddbe9,I9c10dac9,I53bfff85,I06f7594d,I24bff8d4, ... into integration
* changes: nxp lx2160a-aqds: new plat based on soc lx2160a NXP lx2160a-rdb: new plat based on SoC lx2160a nxp lx2162aqds: new plat based on soc lx2160a nxp: errata handling at soc level for lx2160a nxp: make file for loading additional ddr image nxp: adding support of soc lx2160a nxp: deflt hdr files for soc & their platforms nxp: platform files for bl2 and bl31 setup nxp: warm reset support to retain ddr content nxp: nv storage api on platforms nxp: supports two mode of trusted board boot nxp: fip-handler for additional fip_fuse.bin nxp: fip-handler for additional ddr-fip.bin nxp: image loader for loading fip image nxp: svp & sip smc handling nxp: psci platform functions used by lib/psci nxp: helper function used by plat & common code nxp: add data handler used by bl31 nxp: adding the driver.mk file nxp-tool: for creating pbl file from bl2 nxp: adding the smmu driver nxp: cot using nxp internal and mbedtls nxp:driver for crypto h/w accelerator caam nxp:add driver support for sd and emmc nxp:add qspi driver nxp: add flexspi driver support nxp: adding gic apis for nxp soc nxp: gpio driver support nxp: added csu driver nxp: driver pmu for nxp soc nxp: ddr driver enablement for nxp layerscape soc nxp: i2c driver support. NXP: Driver for NXP Security Monitor NXP: SFP driver support for NXP SoC NXP: Interconnect API based on ARM CCN-CCI driver NXP: TZC API to configure ddr region NXP: Timer API added to enable ARM generic timer nxp: add dcfg driver nxp:add console driver for nxp platform tools: add mechanism to allow platform specific image UUID tbbr-cot: conditional definition for the macro tbbr-cot: fix the issue of compiling time define cert_create: updated tool for platform defined certs, keys & extensions tbbr-tools: enable override TRUSTED_KEY_CERT
show more ...
|
| #
18644159 |
| 09-Dec-2020 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
tbbr-cot: conditional definition for the macro
Conditional definition for the macro MAX_NUMBER_IDS.
This will allow to update this definition by the platform specific implementation.
Since, NXP So
tbbr-cot: conditional definition for the macro
Conditional definition for the macro MAX_NUMBER_IDS.
This will allow to update this definition by the platform specific implementation.
Since, NXP SoC lx2160a based platforms requires additional FIP DDR to be loaded before initializing the DDR.
It requires addition of defines for DDR image IDs. A dedicated header plat_tbbr_img_def.h is added to the platform folder - plat/nxp/common/include/default/
Inclusion of this header file will depend on the compile time flag PLAT_TBBR_IMG_DEF.
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: I4faba74dce578e2a34acbc8915ff75d7b8368cee
show more ...
|
| #
007be5ec |
| 14-Aug-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "sp_dual_signing" into integration
* changes: dualroot: add chain of trust for Platform owned SPs cert_create: add Platform owned secure partitions support
|
| #
2947412d |
| 31-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
dualroot: add chain of trust for Platform owned SPs
For dualroot CoT there are two sets of SP certificates, one owned by Silicon Provider(SiP) and other owned by Platform. Each certificate can have
dualroot: add chain of trust for Platform owned SPs
For dualroot CoT there are two sets of SP certificates, one owned by Silicon Provider(SiP) and other owned by Platform. Each certificate can have a maximum of 4 SPs.
This patch reduces the number of SiP owned SPs from 8 to 4 and adds the remaining 4 to Plat owned SP. Plat owned SP certificate is signed using Platform RoT key and protected against anti-rollback using the Non-trusted Non-volatile counter.
Change-Id: Idc3ddd87d6d85a5506a7435f45a6ec17c4c50425 Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
show more ...
|
| #
cf44cb2c |
| 31-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "tbbr/dualroot: rename SP package certificate file" into integration
|
| #
03a5225c |
| 23-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
tbbr/dualroot: rename SP package certificate file
Currently only single signing domain is supported for SP packages but there is plan to support dual signing domains if CoT is dualroot.
SP_CONTENT_
tbbr/dualroot: rename SP package certificate file
Currently only single signing domain is supported for SP packages but there is plan to support dual signing domains if CoT is dualroot.
SP_CONTENT_CERT_ID is the certificate file which is currently generated and signed with trusted world key which in-turn is derived from Silicon provider RoT key. To allow dual signing domain for SP packages, other certificate file will be derived from Platform owned RoT key.
This patch renames "SP_CONTENT_CERT_ID" to "SIP_SP_CONTENT_CERT_ID" and does other related changes.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I0bc445a3ab257e2dac03faa64f46e36a9fed5e93
show more ...
|
| #
4c67cf32 |
| 10-Jul-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "dts: Add CoT descriptor nodes and properties in device tree" into integration
|
| #
567bfe51 |
| 29-Jun-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
dts: Add CoT descriptor nodes and properties in device tree
Added CoT descriptor nodes and properties in device tree. Currently, CoT descriptors which are used by BL2 are added as part of device tre
dts: Add CoT descriptor nodes and properties in device tree
Added CoT descriptor nodes and properties in device tree. Currently, CoT descriptors which are used by BL2 are added as part of device tree.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Iff23cff843e5489fac18bcee5f5d6a71de5ad0d0
show more ...
|
| #
02383c28 |
| 09-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sp_secure_boot" into integration
* changes: dualroot: add chain of trust for secure partitions sptool: append cert_tool arguments. cert_create: add SiP owned secure p
Merge changes from topic "sp_secure_boot" into integration
* changes: dualroot: add chain of trust for secure partitions sptool: append cert_tool arguments. cert_create: add SiP owned secure partitions support
show more ...
|
| #
44f1aa8e |
| 27-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
dualroot: add chain of trust for secure partitions
A new certificate "sip-sp-cert" has been added for Silicon Provider(SiP) owned Secure Partitions(SP). A similar support for Platform owned SP can b
dualroot: add chain of trust for secure partitions
A new certificate "sip-sp-cert" has been added for Silicon Provider(SiP) owned Secure Partitions(SP). A similar support for Platform owned SP can be added in future. The certificate is also protected against anti- rollback using the trusted Non-Volatile counter.
To avoid deviating from TBBR spec, support for SP CoT is only provided in dualroot. Secure Partition content certificate is assigned image ID 31 and SP images follows after it.
The CoT for secure partition look like below. +------------------+ +-------------------+ | ROTPK/ROTPK Hash |------>| Trusted Key | +------------------+ | Certificate | | (Auth Image) | /+-------------------+ / | / | / | / | L v +------------------+ +-------------------+ | Trusted World |------>| SiP owned SPs | | Public Key | | Content Cert | +------------------+ | (Auth Image) | / +-------------------+ / | / v| +------------------+ L +-------------------+ | SP_PKG1 Hash |------>| SP_PKG1 | | | | (Data Image) | +------------------+ +-------------------+ . . . . . . +------------------+ +-------------------+ | SP_PKG8 Hash |------>| SP_PKG8 | | | | (Data Image) | +------------------+ +-------------------+
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ia31546bac1327a3e0b5d37e8b99c808442d5e53f
show more ...
|
| #
d38613df |
| 25-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration
* changes: plat/mediatek/mt81*: Use new bl31_params_parse() helper plat/rockchip: Use new bl31_params_parse_
Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration
* changes: plat/mediatek/mt81*: Use new bl31_params_parse() helper plat/rockchip: Use new bl31_params_parse_helper() Add helper to parse BL31 parameters (both versions) Factor out cross-BL API into export headers suitable for 3rd party code Use explicit-width data types in AAPCS parameter structs plat/rockchip: Switch to use new common BL aux parameter library Introduce lightweight BL platform parameter library
show more ...
|
| #
57bf6057 |
| 29-May-2019 |
Julius Werner <jwerner@chromium.org> |
Factor out cross-BL API into export headers suitable for 3rd party code
This patch adds a new include/export/ directory meant for inclusion in third-party code. This is useful for cases where third-
Factor out cross-BL API into export headers suitable for 3rd party code
This patch adds a new include/export/ directory meant for inclusion in third-party code. This is useful for cases where third-party code needs to interact with TF-A interfaces and data structures (such as a custom BL2-implementation like coreboot handing off to BL31). Directly including headers from the TF-A repository avoids having to duplicate all these definitions (and risk them going stale), but with the current header structure this is not possible because handoff API definitions are too deeply intertwined with other TF code/headers and chain-include other headers that will not be available in the other environment.
The new approach aims to solve this by separating only the parts that are really needed into these special headers that are self-contained and will not chain-include other (non-export) headers. TF-A code should never include them directly but should instead always include the respective wrapper header, which will include the required prerequisites (like <stdint.h>) before including the export header. Third-party code can include the export headers via its own wrappers that make sure the necessary definitions are available in whatever way that environment can provide them.
Change-Id: Ifd769320ba51371439a8e5dd5b79c2516c3b43ab Signed-off-by: Julius Werner <jwerner@chromium.org>
show more ...
|
| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
|
| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
|
| #
c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
show more ...
|
| #
0595abce |
| 18-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1632 from Yann-lms/stm32mp1_mmc
Add MMC support for STM32MP1
|
| #
6fe8b195 |
| 15-Oct-2018 |
Yann Gautier <yann.gautier@st.com> |
Add new defines for STM32MP1 platform
To boot on eMMC or SD-cards, STM32MP1 platform needs: - GPT_IMAGE_ID to read GPT table on those devices - STM32_IMAGE_ID and IO_TYPE_STM32IMAGE to read images w
Add new defines for STM32MP1 platform
To boot on eMMC or SD-cards, STM32MP1 platform needs: - GPT_IMAGE_ID to read GPT table on those devices - STM32_IMAGE_ID and IO_TYPE_STM32IMAGE to read images with STM32 header - IO_TYPE_MMC to have a IO for MMC devices
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| #
dcf95e7e |
| 30-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1542 from antonio-nino-diaz-arm/an/bl31-misra
Some MISRA fixes in BL31, cci and smmu
|
| #
819df3fc |
| 21-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Fix MISRA defects in some common headers
Change-Id: I8fbb4c785e7e07c7241e0c399a9b65161985c9df Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
|
| #
8b371200 |
| 16-Apr-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1356 from robertovargas-arm/misra-changes
Misra changes
|
| #
735181b6 |
| 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.3 Part 4
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers
Fixed for: make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1
Fix MISRA rule 8.3 Part 4
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers
Fixed for: make DEBUG=1 PLAT=fvp SPD=tspd TRUSTED_BOARD_BOOT=1 \ GENERATE_COT=1 ARM_ROTPK_LOCATION=devel_rsa \ ROT_KEY=arm_rotprivk_rsa.pem MBEDTLS_DIR=mbedtls all
Change-Id: Ia34fe1ae1f142e89c9a6c19831e3daf4d28f5831 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
show more ...
|
| #
c7aa7fdf |
| 26-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1263 from soby-mathew/sm/dyn_config
Dynamic Configuration Prototype
|
| #
bf9ce61b |
| 08-Jan-2018 |
Soby Mathew <soby.mathew@arm.com> |
Add dynamic config image IDs
Change-Id: I147031dea9487dc1976e31ad40c89b221e44edbc Signed-off-by: Soby Mathew <soby.mathew@arm.com>
|
| #
6d31020e |
| 07-Nov-2017 |
Soby Mathew <soby.mathew@arm.com> |
Dynamic cfg: Add HW and TB_FW configs to CoT
This patch adds image IDs to `hw_config` and `tb_fw_config` and includes them in the default Chain Of Trust (CoT).
Change-Id: If7bb3e9be8a5e48be76614b35
Dynamic cfg: Add HW and TB_FW configs to CoT
This patch adds image IDs to `hw_config` and `tb_fw_config` and includes them in the default Chain Of Trust (CoT).
Change-Id: If7bb3e9be8a5e48be76614b35bf43d58fc7fed12 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
show more ...
|