feat(fdts stm32mp1): align DT with latest kernel

Update STM32MP1 device tree files with kernel 5.15.

Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@s

feat(fdts stm32mp1): align DT with latest kernel

Update STM32MP1 device tree files with kernel 5.15.

Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(tc): enable MPMM

This change enables MPMM and adds, to the TC firmware configuration
device tree, the AMU counters representing the "gears" for the
Maximum Power Mitigation Mechanism feature of

feat(tc): enable MPMM

This change enables MPMM and adds, to the TC firmware configuration
device tree, the AMU counters representing the "gears" for the
Maximum Power Mitigation Mechanism feature of the Cortex-X2,
Cortex-A710 and Cortex-A510:

- Gear 0: throttle medium and high bandwidth vector and viruses.
- Gear 1: throttle high bandwidth vector and viruses.
- Gear 2: throttle power viruses only.

This ensures these counters are enabled and context-switched as
expected.

Change-Id: I6df6e0fe3a5362861aa967a78ab7c34fc4bb8fc3
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fix(plat/arm): remove unused memory node

memory information is passed to kernel via u-boot.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I3ef31047f92d96302cc98257e965751929a08541

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme

Merge changes from topic "za/feat_rme" into integration

* changes:
refactor(gpt): productize and refactor GPT library
feat(rme): disable Watchdog for Arm platforms if FEAT_RME enabled
docs(rme): add build and run instructions for FEAT_RME
fix(plat/fvp): bump BL2 stack size
fix(plat/fvp): allow changing the kernel DTB load address
refactor(plat/arm): rename ARM_DTB_DRAM_NS region macros
refactor(plat/fvp): update FVP platform DTS for FEAT_RME
feat(plat/arm): add GPT initialization code for Arm platforms
feat(plat/fvp): add memory map for FVP platform for FEAT_RME
refactor(plat/arm): modify memory region attributes to account for FEAT_RME
feat(plat/fvp): add RMM image support for FVP platform
feat(rme): add GPT Library
feat(rme): add ENABLE_RME build option and support for RMM image
refactor(makefile): remove BL prefixes in build macros
feat(rme): add context management changes for FEAT_RME
feat(rme): add Test Realm Payload (TRP)
feat(rme): add RMM dispatcher (RMMD)
feat(rme): run BL2 in root world when FEAT_RME is enabled
feat(rme): add xlat table library changes for FEAT_RME
feat(rme): add Realm security state definition
feat(rme): add register definitions and helper functions for FEAT_RME

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refactor(plat/fvp): update FVP platform DTS for FEAT_RME

This patch make minor modifications to FVP DTS including modifying
the Non-secure memory range when RME is enabled.

Signed-off-by: Zelalem A

refactor(plat/fvp): update FVP platform DTS for FEAT_RME

This patch make minor modifications to FVP DTS including modifying
the Non-secure memory range when RME is enabled.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: I6b3650a2abfff10462a8a2d42755e6d764f7b035

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feat(drivers/arm/ethosn)!: multi-device support

Add support for Arm Ethos-N NPU multi-device.

The device tree parsing currently only supports one NPU device with
multiple cores. To be able to suppo

feat(drivers/arm/ethosn)!: multi-device support

Add support for Arm Ethos-N NPU multi-device.

The device tree parsing currently only supports one NPU device with
multiple cores. To be able to support multi-device NPU configurations
this patch adds support for having multiple NPU devices in the device
tree.

To be able to support multiple NPU devices in the SMC API, it has been
changed in an incompatible way so the API version has been bumped.

Signed-off-by: Laurent Carlier <laurent.carlier@arm.com>
Change-Id: Ide279ce949bd06e8939268b9601c267e45f3edc3

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feat(fdts): add firewall regions into STM32MP1 DT

Add the corresponding firewall memory regions
into fw-config device tree.

Change-Id: Ie39b0339f3c42b3dd756354138a872500c64f84c
Signed-off-by: Lione

feat(fdts): add firewall regions into STM32MP1 DT

Add the corresponding firewall memory regions
into fw-config device tree.

Change-Id: Ie39b0339f3c42b3dd756354138a872500c64f84c
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(fdts): add IO policies for STM32MP1

Add the UUID into the io policies node that are retrieved
by BL2 using stm32mp_fconf_io.c populate function.

Change-Id: I595d5a41a1e0a27fcc02ea2ab5495d9dbf0

feat(fdts): add IO policies for STM32MP1

Add the UUID into the io policies node that are retrieved
by BL2 using stm32mp_fconf_io.c populate function.

Change-Id: I595d5a41a1e0a27fcc02ea2ab5495d9dbf0e6773
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(fdts): add STM32MP1 fw-config DT files

Create all boards fw-config DT files. They all include a generic
stm32mp15-fw-config.dtsi.

Change-Id: Ib9ac8a59e93e01365001b0d11fee41f7c507c08e
Signed-of

feat(fdts): add STM32MP1 fw-config DT files

Create all boards fw-config DT files. They all include a generic
stm32mp15-fw-config.dtsi.

Change-Id: Ib9ac8a59e93e01365001b0d11fee41f7c507c08e
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(plat/st): use FIP to load images

BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP fil

feat(plat/st): use FIP to load images

BL2 still uses the STM32 header binary format to be loaded from ROM code.
BL32 and BL33 and their respective device tree files are now put together
in a FIP file.
One DTB is created for each BL. To reduce their sizes, 2 new dtsi file are
in charge of removing useless nodes for a given BL. This is done because
BL2 and BL32 share the same device tree files base.

The previous way of booting is still available, the compilation flag
STM32MP_USE_STM32IMAGE has to be set to 1 in the make command. Some files
are duplicated and their names modified with _stm32_ to avoid too much
switches in the code.

Change-Id: I1ffada0af58486d4cf6044511b51e56b52269817
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(plat/arm): Introduce TC1 platform

This renames tc0 platform folder and files to tc, and introduces
TARGET_PLATFORM variable to account for the differences between
TC0 and TC1.

Signed-off-by: U

feat(plat/arm): Introduce TC1 platform

This renames tc0 platform folder and files to tc, and introduces
TARGET_PLATFORM variable to account for the differences between
TC0 and TC1.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I5b4a83f3453afd12542267091b3edab4c139c5cd

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Merge changes from topic "tc0_tfa_v25" into integration

* changes:
fix(tc0): remove ffa and optee device tree node
fix(tc0): set cactus-tertiary vcpu count to 1
fix(tc0): change UUID to string

Merge changes from topic "tc0_tfa_v25" into integration

* changes:
fix(tc0): remove ffa and optee device tree node
fix(tc0): set cactus-tertiary vcpu count to 1
fix(tc0): change UUID to string format

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Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration

* changes:
feat(tc0): add cpu capacity to provide scheduling information
fix(tc0): remove "arm,psci" from psci node
feat(tc0): upda

Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration

* changes:
feat(tc0): add cpu capacity to provide scheduling information
fix(tc0): remove "arm,psci" from psci node
feat(tc0): update mhuv2 dts node to align with upstream driver

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feat(tc0): add cpu capacity to provide scheduling information

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I8d3342315a46c78b4c41582ec114f0364a194316

fix(tc0): remove "arm,psci" from psci node

"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which
arent present in the device tree, so remove it from psci compatible.

Signed-off-by:

fix(tc0): remove "arm,psci" from psci node

"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which
arent present in the device tree, so remove it from psci compatible.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Icd1ce8ec7fd3f270925e4b3d5d0187088ffe4ba5

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feat(tc0): update mhuv2 dts node to align with upstream driver

The MHUv2 driver has been merged upstream, and it has a different
dts format compared to what was previously used. This patch aligns
wi

feat(tc0): update mhuv2 dts node to align with upstream driver

The MHUv2 driver has been merged upstream, and it has a different
dts format compared to what was previously used. This patch aligns
with the upstream driver.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Ic963c21c1475d301c3a75686718e6e17841831c3

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fix(tc0): remove ffa and optee device tree node

As FF-A driver probes OP-TEE SP dynamically, these entries are no more
required.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

fix(tc0): remove ffa and optee device tree node

As FF-A driver probes OP-TEE SP dynamically, these entries are no more
required.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ica091722a7fad13e02662b9b2cd11ca1879b9f80

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feat(tc0): add bootargs node

We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e18000528

feat(tc0): add bootargs node

We will maintain the kernel command line here instead of in U-Boot.

Signed-off-by: Anders Dellien <anders.dellien@arm.com>
Change-Id: I6011306cbaf47717c061f542e180005281695516

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fix(fdts/morello): fix scmi clock specifier to cluster mappings

Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag K

fix(fdts/morello): fix scmi clock specifier to cluster mappings

Fix the mapping of SCMI clock specifiers to the clusters they drive.
Also, add CPU cores to cluster mappings.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Change-Id: I230bea5614de4e29b54e1686b31bf01c0b6aa86c

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fix(plat/arm_fpga): increase initrd size

In the comment in the ARM FPGA DT we promise a generous 100 MB initrd,
but actually describe only a size of 20 MB.

As initrds are the most common and easy u

fix(plat/arm_fpga): increase initrd size

In the comment in the ARM FPGA DT we promise a generous 100 MB initrd,
but actually describe only a size of 20 MB.

As initrds are the most common and easy userland option for the boards,
let's increase the maximum size to the advertised 100 MB, to avoid
unpacking errors when an initrd exceeds the current limit of 20 MB.

Change-Id: If08ba3fabdad27b2c2aff93b18c3f664728b4348
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(tc0): update Matterhorn ELP DVFS clock index

This allows the the Matterhorn ELP Arm core to operate at its
designated OPP.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I7ccef0cfd0

feat(tc0): update Matterhorn ELP DVFS clock index

This allows the the Matterhorn ELP Arm core to operate at its
designated OPP.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: I7ccef0cfd079d630c3cfe7874590bf42789a1dca

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Merge changes from topic "mit-license" into integration

* changes:
fix(dt-bindings): fix static checks
docs(license): rectify `arm-gic.h` license

Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration

* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to t

Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration

* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl
fdts: stm32mp1: add I2C2 pins in the pinctrl
fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS

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fix(dt-bindings): fix static checks

This patch fixes static checks errors reported for missing copyright in
`include/dt-bindings/interrupt-controller/arm-gic.h` and the include
order of header files

fix(dt-bindings): fix static checks

This patch fixes static checks errors reported for missing copyright in
`include/dt-bindings/interrupt-controller/arm-gic.h` and the include
order of header files in `.dts` and `.dtsi` files.

Change-Id: I2baaf2719fd2c84cbcc08a8f0c4440a17a9f24f6
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Signed-off-by: Chris Kay <chris.kay@arm.com>

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fdts: stm32mp1: add support for the Seeed Odyssey SoM and board

Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the
STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and

fdts: stm32mp1: add support for the Seeed Odyssey SoM and board

Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the
STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a
cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a
4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD
output, and the other available at the MPU’s port PG3. The SoM can be
plugged into a carrier board using its three 70‑pin connectors.

Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in
a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a
microSD card port and various I/O interfaces.

The device tree is based on the DKx boards. TF‑A was successfully tested
on the board with Buildroot 2021.02 and U-Boot 2021.04.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914

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