feat(dt-bindings): introduce CCA CoT, rename TBBR

Add CCA CoT DTB and rename generic CoT DTB to TBBR CoT DTB

This allows CCA platforms to get their chain of trust description
from a configuration f

feat(dt-bindings): introduce CCA CoT, rename TBBR

Add CCA CoT DTB and rename generic CoT DTB to TBBR CoT DTB

This allows CCA platforms to get their chain of trust description
from a configuration file, rather than hard-coding it into the
firmware itself.

Change-Id: I114788a5d21b9a8d625239cfb71b442d204e3654
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...

feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1

Ad the board ID OTP node for the STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I394b27f50a8f45c919a1e9

feat(stm32mp2-fdts): add board ID OTP in STM32MP257F-EV1

Ad the board ID OTP node for the STM32MP257F-EV1 board.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I394b27f50a8f45c919a1e907e03572b25d958ae4

show more ...

feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file

Add the BSEC node in STM32MP25 device tree file, with the OTP fuses
that will be used by TF-A.

Signed-off-by: Yann Gautier <yann.gautier

feat(stm32mp2-fdts): add OTP nodes in STM32MP251 SoC DT file

Add the BSEC node in STM32MP25 device tree file, with the OTP fuses
that will be used by TF-A.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I1ffdbd17829f4adf7b113ae0bec7547a6d1b4bac

show more ...

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it

refactor(st): use dashes for BSEC node names

This is something commonly asked by Linux kernel DT maintainers [1].
The mentioned doc is not upstreamed, but may be checked with dtbs_check.
While at it align some nodes with Linux or OP-TEE.

[1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/

Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(fvp): add support for virto-net, virtio-9p and virtio-rng

Add virtio-net and virtio-9p devices to the devicetree without the
status set. This ensures that the MMIO frame is set, and it is not
f

feat(fvp): add support for virto-net, virtio-9p and virtio-rng

Add virtio-net and virtio-9p devices to the devicetree without the
status set. This ensures that the MMIO frame is set, and it is not
fatal to start the driver initialisation procedure, which will
typically bail out if it finds zero virtqueues.

Add the virtio-rng device with status disabled. The disabled status
is chosen because the FVP models have only supported this since 2022
and older models would trigger an external abort when trying to access
or probe this MMIO region.

This is included by the fvp-base devicetrees.

Change-Id: Ia0a853533bb5d619a3d415e35b3217ad3a978ada
Signed-off-by: Diego Sueiro <Diego.Sueiro@arm.com>
Signed-off-by: Debbie Martin <Debbie.Martin@arm.com>

show more ...

feat(fvp): add stdout-path

Add stdout-path to the fvp-base devicetree to be passed to BL33 (U-Boot)
and then to the Linux kernel to be compliant to Arm SystemReady IR:
https://developer.arm.com/docu

feat(fvp): add stdout-path

Add stdout-path to the fvp-base devicetree to be passed to BL33 (U-Boot)
and then to the Linux kernel to be compliant to Arm SystemReady IR:
https://developer.arm.com/documentation/DUI1101/2-0/
Configure-U-Boot-for-SystemReady/Adapt-the-Devicetree

This has been tested by booting fvp-base to Linux and ensuring the
console is accessible.

Change-Id: Iae98630f18f735ce344c1158f41f358c2a49eeb6
Signed-off-by: Diego Sueiro <Diego.Sueiro@arm.com>
Signed-off-by: Debbie Martin <Debbie.Martin@arm.com>

show more ...

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

show more ...

fix(stm32mp13-fdts): cosmetic fixes in PLL nodes

- remove spaces in DT properties.
- rename pll3_vco_417_8Mhz into pll3_vco_417Mhz

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
C

fix(stm32mp13-fdts): cosmetic fixes in PLL nodes

- remove spaces in DT properties.
- rename pll3_vco_417_8Mhz into pll3_vco_417Mhz

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Iec3b9ef70dd3c70873263f4959bf6c03d26cbe7d

show more ...

feat(stm32mp2-fdts): add stm32mp257f-ev1 board

Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI
SoC, with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2
typeC, SNOR Octo

feat(stm32mp2-fdts): add stm32mp257f-ev1 board

Add STM32MP257F Evaluation board support. It embeds a STM32MP257FAI
SoC, with 4GB of DDR4, TSN switch (2+1 ports), 2*USB typeA, 1*USB2
typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I92da3a7085a4d2f2d606777c4215aed55f77c589

show more ...

feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files

Three packages exist for stm32mp25 dies. As ball-out is different
between them, this patch covers those differences by introducing
dedicated pi

feat(stm32mp2-fdts): introduce stm32mp25 pinctrl files

Three packages exist for stm32mp25 dies. As ball-out is different
between them, this patch covers those differences by introducing
dedicated pinctrl dtsi files. Each dtsi pinctrl package file
describes the package ball-out through gpio-ranges.

Available packages are:

STM32MP25xAI: 18*18/FCBGA 172 ios
STM32MP25xAK: 14*14/FCBGA 144 ios
STM32MP25xAL: 10*10/TFBGA 144 ios

It includes also the common file used for pin groups definition.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I8500ccccb7a96748f36ffc80edc91da8595f4da8

show more ...

feat(stm32mp2-fdts): introduce stm32mp25 SoCs family

STM32MP25 family is composed of 4 SoCs defined as following:

-STM32MP251: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, U

feat(stm32mp2-fdts): introduce stm32mp25 SoCs family

STM32MP25 family is composed of 4 SoCs defined as following:

-STM32MP251: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display,
1*ETH ...

-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.

-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).

A second diversity layer exists for security features/ A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.

Change-Id: Icd1351e20b862675d257dede55df190a90acbd59
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Sig

feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Iaf95867095f0514ec3994b9c9efd9756ed49ef43

show more ...

feat(fdts/morello): add thermal framework

Add thermal zones, cooling maps (passive cooling via DVFS),
trip points, etc. for Morello SoC.

Change-Id: I5bbc2999a5fd16ebbb3bb2f987eeb42f70961b98
Signed-

feat(fdts/morello): add thermal framework

Add thermal zones, cooling maps (passive cooling via DVFS),
trip points, etc. for Morello SoC.

Change-Id: I5bbc2999a5fd16ebbb3bb2f987eeb42f70961b98
Signed-off-by: Anurag Koul <anurag.koul@arm.com>

show more ...

refactor(ethos-n): move build flags to ethosn_npu.mk

The build flags to enable the Arm(R) Ethos(TM)-N NPU driver are in arm
platform specific make files i.e. plat/arm/common/arm_common.mk. These
fla

refactor(ethos-n): move build flags to ethosn_npu.mk

The build flags to enable the Arm(R) Ethos(TM)-N NPU driver are in arm
platform specific make files i.e. plat/arm/common/arm_common.mk. These
flags are renamed and moved to ethosn_npu.mk. Other source and make
files are changed to reflect the changes in these flags.

Signed-off-by: Rajasekaran Kalidoss <rajasekaran.kalidoss@arm.com>
Change-Id: I6fd20225343c574cb5ac1f0f32ff2fc28ef37ea6

show more ...

feat(morello): add support for I2S audio

Add support for Morello I2S audio subsystem. This includes adding the
audio formatter and I2S transmitter nodes and gluing them together with
the hdmi codec

feat(morello): add support for I2S audio

Add support for Morello I2S audio subsystem. This includes adding the
audio formatter and I2S transmitter nodes and gluing them together with
the hdmi codec using a simple sound card machine node.

Change-Id: I3de4b06ef965c8e0555d074118b944fe6b4b78bb
Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Signed-off-by: Faiz Abbas <faiz.abbas@arm.com>

show more ...

feat(morello): fdts: add CoreSight DeviceTree bindings

Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: I6bc524aa9a4810e2c2df92df7fd13a27b0328766

fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible

fix(stm32mp13-fdts): correct the BSEC nodes compatible

Device tree alignment with kernel and latest binding for BSEC node:
the rev2.0 is used on STM32MP13x devices with the new compatible
compatible = "st,stm32mp13-bsec".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I62c4090ae5d5c1de901e6df1e8ea5d1a3296a272

show more ...

fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
Th

fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
This also ease checks for ST tools.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib467a6b65f05a84c9678799ad32e1820249b4ed1

show more ...

Merge "fix(stm32mp15-fdts): use /omit-if-no-ref/ for spi and i2c" into integration

fix(stm32mp15-fdts): use /omit-if-no-ref/ for spi and i2c

Use /omit-if-no-ref/ keyword in DT to remove extra device nodes only
when they are not used / not referenced.

If the board device tree only

fix(stm32mp15-fdts): use /omit-if-no-ref/ for spi and i2c

Use /omit-if-no-ref/ keyword in DT to remove extra device nodes only
when they are not used / not referenced.

If the board device tree only defines subnodes, dtc does not consider it
as usage, you have to specifically mention device's phandle, e.g.:

\ {
i2c6-phandle = <&i2c6>;
};

or in aliases section
aliases {
i2c6 = &i2c6;
};

Signed-off-by: Vyacheslav Yurkov <uvv.mail@gmail.com>
Change-Id: I431ecd93576f97fd021d82d23b93c659fc8f26b8

show more ...

feat(ethos-n): add multiple asset allocators

Adds additional asset allocators to the device tree include
file as the non-secure world kernel module for the Arm(R)
Ethos(TM)-N NPU now fully supports

feat(ethos-n): add multiple asset allocators

Adds additional asset allocators to the device tree include
file as the non-secure world kernel module for the Arm(R)
Ethos(TM)-N NPU now fully supports having and using multiple
asset allocators.

Signed-off-by: Joshua Pimm <joshua.pimm@arm.com>
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I82d53667ef64968ee814f611d0a90abd3b3cf3de

show more ...

Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): mov

Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): move mbedtls config files
refactor(st): add common mk files

show more ...

Merge "feat(stm32mp15-fdts): add support for prtt1x board family" into integration

feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes

With the /omit-if-no-ref/ keyword in DT, the non-referenced nodes
are just removed. This allows reducing the size of device tree blobs.
Setti

feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes

With the /omit-if-no-ref/ keyword in DT, the non-referenced nodes
are just removed. This allows reducing the size of device tree blobs.
Setting it before pins node allows a size reduction of more than 2kB.
The corresponding nodes can also be removed from BL2 and BL32 DT
overlays.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6b4a4d227d5592e1d253a1b35da2dafaac2ddcae

show more ...

fix(pmu): switch FVP PMUv3 SPIs to PPI

FVP PMUv3 SPIs legacy interrupts are only listed for
cluster #0 and are missing for cluster #1.
This patch changes FVP SPIs to PMUv3 PPI as in
arm_fpga.dtsi, m

fix(pmu): switch FVP PMUv3 SPIs to PPI

FVP PMUv3 SPIs legacy interrupts are only listed for
cluster #0 and are missing for cluster #1.
This patch changes FVP SPIs to PMUv3 PPI as in
arm_fpga.dtsi, morello.dtsi and n1sdp.dtsi.

Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
Change-Id: Ic624cec09ba932666c746ae1a6a4b78b6decde96

show more ...