| 3210a434 | 06-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(gicv3): fix iroute value wrong issue" into integration |
| 65bc2d22 | 27-Oct-2021 |
Ming Huang <huangming@linux.alibaba.com> |
fix(gicv3): fix iroute value wrong issue
As mpidr is unsigned long long, U should be ULL. We use macro to fix this issue.
Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Change-Id: I7dfd51a
fix(gicv3): fix iroute value wrong issue
As mpidr is unsigned long long, U should be ULL. We use macro to fix this issue.
Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Change-Id: I7dfd51a63f27f471794bcbf72ffff0c1a0598b46
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| 165ad556 | 11-Sep-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(drivers/st/uart): add uart driver for STM32MP1
Add a UART/USART driver for STM32 with complete a hardware support; it used for STM32CubeProgrammer support with even parity.
This driver is not
feat(drivers/st/uart): add uart driver for STM32MP1
Add a UART/USART driver for STM32 with complete a hardware support; it used for STM32CubeProgrammer support with even parity.
This driver is not used for console, which is already handle by a simple driver (drivers/st/uart/aarch32/stm32_console.S).
Change-Id: Ia9266e5d177fe7fd09c8a15b81da1a05b1bc8b2d Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| bf1af154 | 04-Sep-2020 |
Patrick Delaunay <patrick.delaunay@st.com> |
feat(stm32mp1): preserve the PLL4 settings for USB boot
The PLL4 can be used by ROM code as the source clock of USB PHYC and, in this case, the PLL4 configuration must be preserved with pll4_preserv
feat(stm32mp1): preserve the PLL4 settings for USB boot
The PLL4 can be used by ROM code as the source clock of USB PHYC and, in this case, the PLL4 configuration must be preserved with pll4_preserve to avoid USB disturbance.
This patch also adds an error when the clock tree PLL4 configuration is not the PLL4 configuration used by ROM code; this error allows to detect a invalid clock tree.
This commit corrects the coverity issue 343023.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Change-Id: I4bae9312a2db8dd342a38e649513d689b13976bb
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| 0ee80f35 | 15-Nov-2021 |
Pali Rohár <pali@kernel.org> |
fix(plat/marvell/a3720/uart): do external reset during initialization
Sometimes when changing UART clock from TBG to XTAL, UART HW enters into some broken state. It does not transit characters from
fix(plat/marvell/a3720/uart): do external reset during initialization
Sometimes when changing UART clock from TBG to XTAL, UART HW enters into some broken state. It does not transit characters from TX FIFO anymore and TX FIFO stays always empty. TX FIFO reset does not recover UART HW from this broken state.
Experiments show that external reset can fix UART HW from this broken state.
TF-A fatal error handler calls console_a3700_core_init() function to initialize UART HW. This handler may be called anytime during CPU runtime, also when kernel is running.
U-Boot or Linux kernel may change UART clock to TBG to achieve higher baudrates. During initialization, console_a3700_core_init() resets UART configuration to default settings, which means that it also changes UART clock from TBG to XTAL.
Do an external reset of UART via North Bridge Peripheral reset register to prevent this UART hangup.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I8990bce24d1a6fd8ccc47a2cd0a5ff932fcfcf14
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| 15546dbf | 15-Nov-2021 |
Pali Rohár <pali@kernel.org> |
fix(plat/marvell/a3720/uart): configure UART after TX FIFO reset
If TX FIFO is not empty, do not touch UART settings and let UART HW transmit remaining bytes from TX FIFO. New UART settings are then
fix(plat/marvell/a3720/uart): configure UART after TX FIFO reset
If TX FIFO is not empty, do not touch UART settings and let UART HW transmit remaining bytes from TX FIFO. New UART settings are then set only after TX FIFO is reset.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I2976c0a4fbb841d3a79d42ef67c06e70174afc3b
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| 7c85a757 | 15-Nov-2021 |
Pali Rohár <pali@kernel.org> |
feat(plat/marvell/a3720/uart): preserve x1/x2 regs in console_a3700_core_init()
Followup changes will need function arguments in registers x0, x1 and x2. Do not modify x1 and x2 registers and instea
feat(plat/marvell/a3720/uart): preserve x1/x2 regs in console_a3700_core_init()
Followup changes will need function arguments in registers x0, x1 and x2. Do not modify x1 and x2 registers and instead use scratch x3 and x4 registers for storing local variables.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I8551a802995f39128d2f4a8f8076b5bf463d0db0
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| 426a1119 | 31-Oct-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
refactor(measured boot): rename a macro INVALID_ID to EVLOG_INVALID_ID
Renamed a macro 'INVALID_ID' to 'EVLOG_INVALID_ID' to avoid its clash with other macro names and to show it is explicitly used
refactor(measured boot): rename a macro INVALID_ID to EVLOG_INVALID_ID
Renamed a macro 'INVALID_ID' to 'EVLOG_INVALID_ID' to avoid its clash with other macro names and to show it is explicitly used for Event Log driver.
Change-Id: Ie4c92b3cd1366d9a59cd6f43221e24734865f427 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 7f322f22 | 18-Nov-2021 |
anzhou <anzhou@nvidia.com> |
fix(drivers/gic600ae_fmu): fix timeout calculation
The previous codes were using the cntpct_el0 to check the time elapsed. But this physical timer does not seem to count for the expected time result
fix(drivers/gic600ae_fmu): fix timeout calculation
The previous codes were using the cntpct_el0 to check the time elapsed. But this physical timer does not seem to count for the expected time resulting in gic fmu communication failures on Tegra platforms.
This patch uses the delay_timer instead to use a platform defined timer for calculating timeouts.
Change-Id: Ic8646ad1662c9928ac64c4152deb27e8c86fe344 Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 4ef449c1 | 12-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
fix: use correct printf format for uint64_t
sha 4ce3e99a3 introduced printf format specifiers for fixed width types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pande
fix: use correct printf format for uint64_t
sha 4ce3e99a3 introduced printf format specifiers for fixed width types, which uses PRI*64 instead of "ll" for 64 bit values.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ic6811cc1788c698adde0807e5f8ab5290a900a26
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| 2e43638e | 09-Nov-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_usb" into integration
* changes: fix(drivers/usb): add a optional ops get_other_speed_config_desc fix(drivers/usb): remove unnecessary cast |
| 28623c10 | 08-Nov-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix: libc: use long for 64-bit types on aarch64" into integration |
| 4ce3e99a | 25-Aug-2020 |
Scott Branden <scott.branden@broadcom.com> |
fix: libc: use long for 64-bit types on aarch64
Use long instead of long long on aarch64 for 64_t stdint types. Introduce inttypes.h to properly support printf format specifiers for fixed width type
fix: libc: use long for 64-bit types on aarch64
Use long instead of long long on aarch64 for 64_t stdint types. Introduce inttypes.h to properly support printf format specifiers for fixed width types for such change.
Change-Id: I0bca594687a996fde0a9702d7a383055b99f10a1 Signed-off-by: Scott Branden <scott.branden@broadcom.com>
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| 683bb4d7 | 06-Nov-2021 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "arm_fpga_auto" into integration
* changes: feat(arm_fpga): write UART baud base clock frequency into DTB feat(arm_fpga): query PL011 to learn system frequency refacto
Merge changes from topic "arm_fpga_auto" into integration
* changes: feat(arm_fpga): write UART baud base clock frequency into DTB feat(arm_fpga): query PL011 to learn system frequency refactor(arm_fpga): move command line code into separate function fix(fdt): avoid output on missing DT property feat(arm_fpga): add ITS autodetection feat(arm_fpga): determine GICR base by probing feat(gicv3): introduce GIC component identification feat(libfdt): also allow changing base address fix(arm_fpga): avoid re-linking from executable ELF file
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| 216c1223 | 04-Nov-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(drivers/usb): add a optional ops get_other_speed_config_desc
Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request in USB driver and support a different result than USB_DESC_TYPE_CONF
fix(drivers/usb): add a optional ops get_other_speed_config_desc
Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request in USB driver and support a different result than USB_DESC_TYPE_CONFIGURATION with the new optional ops get_other_speed_config_desc().
The support of this descriptor is optionnal and is only required when high-speed capable device which can operate at its other possible speed.
This patch allows to remove the pbuf update in usb_core_get_desc() and solves an issue on USB re-enumeration on STM32MP15 platform as the result of get_config_desc() is a const array. This issue is not see on normal use-case, as the USB enumeration is only done in ROM code and TF-A reuse the same USB descritors.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I8edcc1e45065ab4e45d48f4bc37b49120674fdb0
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| 025f5ef2 | 04-Nov-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(drivers/usb): remove unnecessary cast
Remove the unnecessary cast on the result of function which already return the correct type.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
fix(drivers/usb): remove unnecessary cast
Remove the unnecessary cast on the result of function which already return the correct type.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: Ie21f7e78a880d30d1f31e32b3d2c3fb09489d65b
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| 73a643ee | 24-Aug-2021 |
Andre Przywara <andre.przywara@arm.com> |
feat(gicv3): introduce GIC component identification
The GIC specification describes ID registers in each GIC register frame (PIDRx), which can be used to identify a GIC component. The Arm Ltd. GIC i
feat(gicv3): introduce GIC component identification
The GIC specification describes ID registers in each GIC register frame (PIDRx), which can be used to identify a GIC component. The Arm Ltd. GIC implementations use certain ID values to identify the distributor, the redistributors and other parts like ITSes.
Introduce a function that reads those part number IDs, which are spread over two registers. The actual numbers are only meaningful in connection with a certain GIC model, which would need to be checked beforehand, by the caller.
Change-Id: Ia6ff326a1e8b12664e4637bc8e2683d2b5c7721c Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 7ca49284 | 02-Nov-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(drivers/usb): remove deadcode when USBD_EP_NB = 1
CID 373791: Control flow issues (DEADCODE) CID 373789: Control flow issues (DEADCODE)
Since USBD_EP_NB = 1 for DFU stack on STMP32MP15 plat
fix(drivers/usb): remove deadcode when USBD_EP_NB = 1
CID 373791: Control flow issues (DEADCODE) CID 373789: Control flow issues (DEADCODE)
Since USBD_EP_NB = 1 for DFU stack on STMP32MP15 platform (only EP0 is required for DFU support) the value of num can't be different of 0 and the code can't be reached in usb_core_receive / usb_core_transmit.
Add a simple sub-function with this part of code.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I07a56909bb1e6de19ce52da7945b6d2916be8538
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| 0cb9870d | 02-Nov-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(drivers/usb): fix Null pointer dereferences in usb_core_set_config
Correct the invalid test on NULL pointer pdev->class in usb_core_set_config function.
This patch fix the coverity errors:
*
fix(drivers/usb): fix Null pointer dereferences in usb_core_set_config
Correct the invalid test on NULL pointer pdev->class in usb_core_set_config function.
This patch fix the coverity errors:
** CID 373790: Null pointer dereferences (FORWARD_NULL) /drivers/usb/usb_device.c: 182 in usb_core_set_config()
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I83e43261bafa2d47f800e56df0b047a6c58a1e29
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| 9a138eb5 | 14-Sep-2020 |
Patrick Delaunay <patrick.delaunay@st.com> |
feat(drivers/st/usb): add device driver for STM32MP1
Add a device driver for Synopsis DWC2 USB IP of STM32MP15x, this USB OTG device is only supported in device mode.
Signed-off-by: Patrick Delauna
feat(drivers/st/usb): add device driver for STM32MP1
Add a device driver for Synopsis DWC2 USB IP of STM32MP15x, this USB OTG device is only supported in device mode.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951
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| 859bfd8d | 04-Sep-2020 |
Patrick Delaunay <patrick.delaunay@st.com> |
feat(drivers/usb): add a USB device stack
Add a new USB framework to manage an USB device profile (USBD) based on a peripheral controller driver (PCD).
This USB stack can be use to implement any Un
feat(drivers/usb): add a USB device stack
Add a new USB framework to manage an USB device profile (USBD) based on a peripheral controller driver (PCD).
This USB stack can be use to implement any Universal Serial Bus Device Class in TF-A on top of a USB driver defined in the platform.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I7971ec6d952edec3511157a198e6e5359df4346b
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| 292bb9a7 | 27-Oct-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix: remove "experimental" tag for stable features" into integration |
| 700e7685 | 21-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
fix: remove "experimental" tag for stable features
there are features which are marked as experimental even though they are stable and used for quite some time. Following features are no longer mark
fix: remove "experimental" tag for stable features
there are features which are marked as experimental even though they are stable and used for quite some time. Following features are no longer marked as experimental - SPMD - MEASURED_BOOT - FCONF and associated build flags - DECRYPTION_SUPPORT and associated build flags - ENABLE_PAUTH - ENABLE_BTI - USE_SPINLOCK_CAS - GICv3 Multichip support
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I4bb653d9c413c66095ec31f0b8aefeb13ea04ee9
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| 0172ac30 | 21-Oct-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(scmi): mention "SCMI" in driver initialisation message" into integration |
| cc808acb | 19-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(cc-713): fix a build failure with CC-713 library" into integration |