| a21da478 | 10-Oct-2018 |
Bryan O'Donoghue <bryan.odonoghue@linaro.org> |
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
commit 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576 reverts an update to the
MMC layer that accompanied the original submission of this
drivers: imx: mxc_usdhc: Do not set MMC_RSP_48 for MMC_RESPONSE_R2
commit 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576 reverts an update to the
MMC layer that accompanied the original submission of this MMC driver this
is the right-thing-to-do in terms of the MMC spec.
Unfortunately the reversion also breaks this driver. The issue is the i.MX
controller doesn't want MMC_RSP_48 set for MMC_RESPONSE_R2.
The appropriate place to place that constraint is obviously in
drivers/imx/usdhc/imx_usdhc.c not in the shared MMC codebase. This patch
restores the logic the i.MX controller requires without breaking it for
everyone else.
Fixes: 97d5db8c5cb95c7ce69ff4d36bcda2aeda143576
Fixes: 2a82a9c95f6c06079f58d69315544a6b49cf64a4
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Jun Nie <jun.nie@linaro.org>
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| aa7877c4 | 10-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
plat/arm: Move norflash driver to drivers/ folder
This way it can be reused by other platforms if needed.
Note that this driver is designed to work with the Versatile Express NOR
flash of Juno and
plat/arm: Move norflash driver to drivers/ folder
This way it can be reused by other platforms if needed.
Note that this driver is designed to work with the Versatile Express NOR
flash of Juno and FVP. In said platforms, the memory is organized as an
interleaved memory of two chips with a 16 bit word.
Any platform that wishes to reuse it with a different configuration will
need to modify the driver so that it is more generic.
Change-Id: Ic721758425864e0cf42b7b9b04bf0d9513b6022e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 200006df | 04-Oct-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1583 from danielboulby-arm/db/AArch32_Multi_Console
Enable Multi Console API in AArch32 |
| c9263e62 | 18-Sep-2018 |
Daniel Boulby <daniel.boulby@arm.com> |
Mark GICV3, CCI and CCN boot time code as init
Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.
Change-Id: I3d77f36758450d9d1d87e
Mark GICV3, CCI and CCN boot time code as init
Mark the GICv3, CCI and CCN code only used in Bl31 initialization
with __init to be reclaimed once no longer needed.
Change-Id: I3d77f36758450d9d1d87ecc60bc1c63fe4082667
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| a4277cda | 03-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1588 from satheesbalya-arm/sb1_2596_misra_tim_console
Fix misra warnings in delay timer and console drivers |
| 3ccfcd6e | 02-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated
Remove deprecated interfaces for all platforms |
| 97d5db8c | 28-Sep-2018 |
Yann Gautier <yann.gautier@st.com> |
mmc: Update framework to use standard response type
Respect official response type and update response to follow
official specification.
All the MMC_RESPONSE_R(_x) are replaced with each correspondi
mmc: Update framework to use standard response type
Respect official response type and update response to follow
official specification.
All the MMC_RESPONSE_R(_x) are replaced with each corresponding define.
Partly revert 2a82a9c95f6c06079f58d69315544a6b49cf64a4 for dw_mmc.c:
Responses R1, R1B and R5 have CRC.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| fe199e3b | 25-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove all other deprecated interfaces and files
Change-Id: Icd1cdd42afdc78895a9be6c46b414b0a155cfa63
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 61d2b40d | 24-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
drivers: cadence: cdns: Fix flush function
It is still a placeholder, but now it is registered correctly by the
macro finish_console_register.
Change-Id: Ic78c966d9be606cbc1a53cec43ead23b32963afe
S
drivers: cadence: cdns: Fix flush function
It is still a placeholder, but now it is registered correctly by the
macro finish_console_register.
Change-Id: Ic78c966d9be606cbc1a53cec43ead23b32963afe
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 28bcc45e | 24-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
console: Remove deprecated files
Change-Id: Ib9eebbdff6f7868e1d1b8c41761cacc7501a25bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
|
| 1a3764ed | 24-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
cci400: Remove deprecated driver
This driver is deprecated.
Change-Id: Ic6e154a5756e779743b17a329eed4570ccc61389
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
|
| b06b678f | 24-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
tzc400: Remove deprecated interfaces
Change-Id: I9874883ec33dbf293f607f9779d7c56f23cb8023
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| f9ed3cb6 | 24-Sep-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
gic: Remove deprecated driver and interfaces
Change-Id: I567a406edb090ae9d109382f6874846a79dd7473
Co-authored-by: Roberto Vargas <roberto.vargas@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ni
gic: Remove deprecated driver and interfaces
Change-Id: I567a406edb090ae9d109382f6874846a79dd7473
Co-authored-by: Roberto Vargas <roberto.vargas@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| a2a69bc8 | 28-Sep-2018 |
Shawn Guo <shawn.guo@linaro.org> |
drivers: mmc: Fix R2 response type definition
The Poplar is broken on eMMC initialization because of commit
2a82a9c95f6c ("drivers: emmc: dw_mmc: Add response flag into response ID
definition"). It
drivers: mmc: Fix R2 response type definition
The Poplar is broken on eMMC initialization because of commit
2a82a9c95f6c ("drivers: emmc: dw_mmc: Add response flag into response ID
definition"). It changes the driver behavior on response type handling
in dw_send_cmd(), because MMC_RESPONSE_R(2) and MMC_RESPONSE_R2 are
different things. MMC core is still sending the former while we already
changed to check the latter in dw_mmc driver.
This patch fixes R2 response type in MMC core code. It's the same
thing as what commit 94522ff7f6d2 ("drivers: mmc: Fix R3 response type
definition") does for R3 response.
With this fix, Poplar is back to work.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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| d47509d6 | 19-Sep-2018 |
Sathees Balya <sathees.balya@arm.com> |
Fix misra warnings in delay timer and console drivers
Change-Id: I43d2b3a0f672b4902edec3d3a39ffedbb0a701a3
Signed-off-by: Sathees Balya <sathees.balya@arm.com> |
| 7e2bbef9 | 19-Sep-2018 |
Daniel Boulby <daniel.boulby@arm.com> |
pl011: Add support in AArch32 for MULTI_CONSOLE_API
Allow AArch32 to use the multi console driver by adding the
required functions
Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936
Signed-off-by
pl011: Add support in AArch32 for MULTI_CONSOLE_API
Allow AArch32 to use the multi console driver by adding the
required functions
Change-Id: I9e69f18965f320074cf75442d6b0de891aef7936
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| 09d2be11 | 19-Sep-2018 |
Daniel Boulby <daniel.boulby@arm.com> |
console: Port Multi Console driver to AArch32
The old driver is now in deprecated_console.S, in a similar way to the
AArch64 driver.
Change-Id: Ib57209c322576c451d466d7406a94adbf01ab8fd
Signed-off-
console: Port Multi Console driver to AArch32
The old driver is now in deprecated_console.S, in a similar way to the
AArch64 driver.
Change-Id: Ib57209c322576c451d466d7406a94adbf01ab8fd
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
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| dfc0fb27 | 09-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
drivers: i2c: mentor: move platform code into header files
At the moment we have two I2C stub drivers (for the Allwinner and the
Marvell platform), which #include the actual .c driver file.
Change t
drivers: i2c: mentor: move platform code into header files
At the moment we have two I2C stub drivers (for the Allwinner and the
Marvell platform), which #include the actual .c driver file.
Change this into the more usual design, by renaming and moving the stub
drivers into platform specific header files and including these from the
actual driver file. The platform specific include directories make sure
the driver picks up the right header automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 5686b2ec | 22-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
allwinner: add I2C glue driver
Allwinner 64-bit SoCs all use the Mentor Graphics MI2CV I2C controller
core, with inverted clear quirk.
Add a glue driver for this.
Signed-off-by: Icenowy Zheng <ice
allwinner: add I2C glue driver
Allwinner 64-bit SoCs all use the Mentor Graphics MI2CV I2C controller
core, with inverted clear quirk.
Add a glue driver for this.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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| 20719914 | 22-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
drivers: mentor: mi2cv: add inverted interrupt clear flag quirk
The I2C controller on Allwinner SoCs after A31 has a inverted interrupt
clear flag, which needs to be written 1 (rather than 0 on Marv
drivers: mentor: mi2cv: add inverted interrupt clear flag quirk
The I2C controller on Allwinner SoCs after A31 has a inverted interrupt
clear flag, which needs to be written 1 (rather than 0 on Marvell SoCs
and old Allwinner SoCs) to clear.
Add such a quirk to mi2cv driver common code.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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| 7e4d5620 | 21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
drivers: mentor: extract MI2CV driver from Marvell driver
The Marvell A8K SoCs use the MI2CV IP core from Mentor Graphics, which
is also used by Allwinner.
As Mentor Graphics allows a lot of custom
drivers: mentor: extract MI2CV driver from Marvell driver
The Marvell A8K SoCs use the MI2CV IP core from Mentor Graphics, which
is also used by Allwinner.
As Mentor Graphics allows a lot of customization, the MI2CV in the two
SoC families are not compatible, and driver modifications are needed.
Extract the common code to a MI2CV driver.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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| f348c351 | 21-Jul-2018 |
Icenowy Zheng <icenowy@aosc.io> |
marvell: drivers: use anonymous union in I2C driver
The I2C controller found in Marvell A8K SoCs (and some older SoCs) mux
status and baudrate registers into the same address, however, it's a
vendor
marvell: drivers: use anonymous union in I2C driver
The I2C controller found in Marvell A8K SoCs (and some older SoCs) mux
status and baudrate registers into the same address, however, it's a
vendor customization, and the original IP core by Mentor Graphics uses
two different addresses for the two registers.
Use anonymous union in the driver, in order to ease code sharing for
other SoC vendors that use this IP core (Allwinner SoCs that are newly
introduced to mainline ATF use this core).
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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| 36044baf | 05-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1515 from bryanodonoghue/atf-master+linaro-warp7-squash-v4
Atf master+linaro warp7 squash v4 |
| 05ca7254 | 05-Sep-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1554 from jts-arm/mbed
Mbed TLS shared heap |
| 8b659130 | 28-Jun-2018 |
Jun Nie <jun.nie@linaro.org> |
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization
and single/multiple block read are tested.
[bod: fixed checkpatch.pl compla
drivers: imx: mxc_usdhc: Add USDHC driver to support boot EMMC
Add USDHC driver to support boot EMMC. Only initialization
and single/multiple block read are tested.
[bod: fixed checkpatch.pl complaints]
[bod: changed name to imx_usdhc for namespace consistency]
[bod: squashed antecedent fixes into this one patch]
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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